Sharp Kabushiki Kaisha Corporation

Hiroyuki Ohkawa

Yuhichiroh Murakami

Shige Furuta

Yasushi Sasaki

Etsuo Yamamoto

Kazuhiro Maeda

Tamotsu Sakai

Makoto Yokoyama

Yasuyuki Ogawa

Sachio Tsujino

An object of the present invention is to realize a display device having a layered wiring structure, that is capable of detecting leakage without fail by using a simple testing circuit. Source bus lines (SL) are wired such that, in the layered region, two source bus lines (SL) adjacent in a vertical direction are a combination of a source bus line (SL) of an odd-numbered column and a source bus line (SL) of an even-numbered column, and two source bus lines (SL) adjacent in a horizontal direction are a combination of a source bus line (SL) of an odd-numbered column and a source bus line (SL) of an even-numbered column. Potentials of different magnitudes are supplied respectively to source bus lines (SL) of odd-numbered columns and source bus lines (SL) of even-numbered columns via testing lines.

Display device

In a display device having a layered wiring structure of P layers, and employing a Q-column reversal driving method in which a polarity of a video signal is reversed every Q source bus lines, the plurality of source bus lines are wired to the plurality of layers such that taking source bus lines of a number equal to a double of a least common multiple of P and Q as one group, the number of source bus lines to which positive video signals are applied matches the number of source bus lines to which negative video signals are applied in each of the layers in each of horizontal scanning periods.

Display device with layered wiring structure for external connection

A shift register according to the present invention is a shift register in which a plurality of unit circuits are connected in cascade, wherein the unit circuit includes a first output transistor whose current path is connected between an output terminal and a clock terminal to which a first clock signal is provided; a second output transistor whose current path is connected between the output terminal and a predetermined potential node; a setting device which, when a control signal is active, sets a signal level of the output terminal to a predetermined signal level; a first output control device which provides a signal level of the control signal to a control electrode of the first output transistor to turn off the first output transistor when the control signal is active; and a second output control device which turns off the second output transistor when the control signal is active.

Shift register and display apparatus

A unit circuit () includes: a transistor (T) having its drain terminal to be supplied with a clock signal (CK) and its source terminal connected to an output terminal (OUT); a transistor (T) which, when supplied with an active all-on control signal (AON), outputs an ON voltage to the output terminal (OUT), and which, when supplied with a nonactive all-on control signal (AONB), stops outputting the ON voltage; a transistor (T) which supplies the ON voltage to a control terminal of the transistor (T) in accordance with an input signal (IN); a transistor (T) which, when supplied with the active all-on control signal (AON), supplies an OFF voltage to a control terminal of the transistor (T). This makes it possible to provide a shift register of a simple structure that can prevent a malfunction from occurring after all-on operation, and to provide a display device.

Shift register including unit circuits connected in multistage manner, and display device

Disclosed is a shift register for use in a display driving circuit that simultaneously selects signal lines, including, in a stage thereof: a flip-flop including an initialization terminal; and a signal generating circuit that receives a simultaneous selection signal and that generates an output signal of the stage by use of an output of the flip-flop, wherein: the output signal of the stage becomes active due to an activation of the simultaneous selection signal so as to be active during a period of the simultaneous selection; the output of the flip-flop is non-active while the initialization terminal, a set terminal, and a reset terminal of the flip-flop; and the initialization terminal of the flip-flop receives the simultaneous selection signal. This shift register makes it possible to downsize various drivers.

Shift register, display-driving circuit, displaying panel, and displaying device

At least one embodiment of the present invention is directed to, even when external noise is applied to a shift register during all-on operation, preventing through-current from flowing in unit circuits and also to prevent increase in load on all-on control signal lines. When a high-level all-on control signal is provided to a unit circuit of a shift register, a transistor Tis brought into off-state, so that a transistor Tcannot output an on-voltage to a first output terminal. However, a transistor Tis brought into on-state, so that the first output terminal outputs an on-voltage to the exterior. On the other hand, a transistor Tis brought into on-state, so that a second output terminal outputs an off-voltage to a unit circuitin the next stage. At this time, the transistor Tis kept in off-state, so that no through-current flows to the transistors Tand T.

Shift register receiving all-on signal and display device

A liquid crystal display apparatus () wherein the shift registers of a source driver () are configured by use of asynchronous RS flip-flops in which an active input to a set input terminal has a higher priority than an active input to a reset terminal. In a second mode of operation, first and second clock signals and a start pulse are fixed at high levels, thereby performing discharges from all the pixels (PIX) of a liquid crystal panel ().

Display apparatus and method for driving the same

A driving circuit of the present invention includes a signal line switching circuit section that connects each signal line with two adjacent ones of output stages of a shift register circuit, one of the two adjacent ones of output stages following the other, switches over so that the signal lines are, in the switching-over manner and in concert, driven either by the following output stages or by the followed output stages. Thus, it is possible to provide a driving circuit that can be freely placed in any manner, is suitable for many purposes, and is capable of switching shifting directions without needing inversion of a clock signal and without causing shift of pixels, and switching the shifting directions with a simple arrangement even if there are an even number of signal lines for driving effective pixel columns.

Growing community of inventors

Osaka, Japan

Hiroyuki Ohkawa