Kabushiki Kaisha Toshiba

Hiroyuki Morinaga

Takema Ito

Arata Inoue

Takashi Sakamoto

Ryoichi Inanami

Takuya Kono

Kazutaka Ishigo

Atsushi Onishi

Yasuhiro Kaga

Kenichi Tsujisawa

Takaki Kumanomido

Masayoshi Yamasaki

According to one embodiment, a recipe management apparatus for comparing recipes prescribing process conditions of processing apparatuses between a plurality of the processing apparatuses having the same type. The recipe management apparatus includes a recipe reading unit, a mask unit, and a determination unit. The recipe reading unit is configured to read binary-format recipes of the plurality of processing apparatuses. The mask unit is configured to apply masks to data of the recipes based on mask position information prescribing positions which are applied with the masks in binary-format data of the recipes. The determination unit is configured to compare the plurality of recipes applied with the masks, and configured to determine whether there is a difference.

Recipe management apparatus and recipe management method

According to one embodiment, a pattern forming method comprises transferring a pattern formed in a surface of a template to a plurality of chip areas in a semiconductor substrate under different transfer conditions. Furthermore, the transferring the pattern formed in the surface of the template to the plurality of chip areas in the semiconductor substrate under the different transfer conditions comprises transferring the pattern formed in the surface of the template to the semiconductor substrate at least twice under each identical transfer condition. Moreover, the pattern forming method comprises dividing each of the plurality of chip areas into a plurality of areas, determining an optimum condition for each set of corresponding divided areas in the plurality of chip areas, and transferring the pattern onto the semiconductor substrate using the optimum transfer condition determined for each divided area.

Transferring pattern onto semiconductor substrate using optimum transfer condition determined for each divided area

A method of inspecting a mark arrangement according to an embodiment of the present invention includes: generating mask data in which mark seed data that includes an inspection mark that includes vector information and is not drawn on a mask and mark data is arranged on a scribe line of the mask, calculating coordinates of the inspection mark from a reference position of the mark seed data, detecting an arrangement state of the inspection mark with respect to the reference position by using the coordinates and vector information, and judging whether the mark seed data is correctly arranged by comparing the arrangement state of the inspection mark with an arrangement check rule.

Mark arrangement inspecting method, mask data, and manufacturing method of semiconductor device

According to the present invention, there is provided a semiconductor manufacturing apparatus having:

Semiconductor manufacturing apparatus and method thereof

A defect inspecting apparatus comprising:

Defect inspecting apparatus for semiconductor wafer

A system for making a recipe for each of manufacturing tools used to manufacture products includes a merging unit merging product information for the products and process information for each of manufacturing processes used for the products to make intermediate recipe data, and a making unit making the recipe for each of the manufacturing tools by merging information of the intermediate recipe data and information of a basic recipe including information of parameters, which specify operations of the manufacturing tools and are commonly set in the manufacturing processes.

System and program for making recipe and method for manufacturing products by using recipe

A design system for delivering data via a network to a plant, which fabricates a semiconductor device by direct writing, includes: a data conversion unit generating the data specified by a product name of the semiconductor device, a layer name, and a machine type of an electron beam lithography system for the direct writing; a central memory unit recording the data; and a plant mediator distributing the data to the plant via the network, and re-distributing the data to the plant in response to a download request associated with the product name, the layer name, and the machine type.

System and method for delivering writing data of a semiconductor device and fabricating a semiconductor device

A coordinate transformation system includes: a layout display unit configured to obtain an arbitrary point in layout data of a semiconductor device as a coordinate value of an FBM physical coordinate system indicative of a physical position; a pattern defining unit configured to define the relationship between an FBM physical address and the FBM physical coordinates using a pattern tree obtained by combining an array pattern, defining lining direction, interval, and the number of components to be disposed at equal intervals, with a random pattern, defining the relationship between the FBM physical address as a coordinate system of FBM data indicative of an electric failure position obtained by a test process of the semiconductor device and the FBM physical coordinates in a one-to-one corresponding manner; and a program generating unit configured to generate a program to transform the FBM physical address into the FBM physical coordinates from the pattern defined.

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Yokohama, Japan

Hiroyuki Morinaga