Kabushiki Kaisha Toshiba

Kioxia Corporation

Toshiba Memory Corporation

Hitachi, Ltd.

Hiroyuki Maeda

Shinji Saito

Toshifumi Minami

Yusuke Akada

Rina Kadowaki

Atsuhiro Sato

Yasuyuki Baba

Keisuke Yonehama

Hiroshi Shinohara

Hideyuki Kamata

Daisuke Imaizumi

Naomi Ito

A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.

Semiconductor device

According to one embodiment, a semiconductor device includes a semiconductor substrate including an element region, a guard ring provided on an outer periphery of the element region and including a first interconnect and a first plug which electrically couples the first-interconnect and a first well region, a second interconnect provided above the first interconnect via a first insulating layer and non-electrically coupling to the first interconnect, and a first circuit coupled to the second interconnect. The first circuit detects one of a crack and a peeling of the guard ring in accordance with a break in the second interconnect or a short circuit between the second interconnect and the first interconnect.

According to one embodiment, a semiconductor memory device includes: a semiconductor substrate; a first semiconductor pillar above the semiconductor substrate; a first insulating layer comprising a first section and a second section, the first section being in contact with the semiconductor substrate and a bottom of the first semiconductor pillar, and the second section covering a side of the first semiconductor pillar; conductive layers and second insulating layers stacked one by one above the semiconductor substrate and covering the second section of the first insulating layer; a first plug on the first semiconductor pillar; and an interconnect on the first plug.

Semiconductor memory device

A semiconductor memory device includes a first portion including a semiconductor element, a second portion surrounding the semiconductor element. The second portion includes a stack of conductive layers and insulating layers, and at least one groove through the conductive layers and the insulating layers.

According to one embodiment, a semiconductor device includes a substrate, a foundation layer, a lower layer side stacked body, an upper layer side stacked body, an inter-layer insulating layer, and a plurality of contact electrodes. The foundation layer is provided in the second contact region to form a difference in levels between the second contact region and the first contact region. The lower layer side stacked body includes a plurality of conductive layers stacked alternately with a plurality of insulating layers. An upper level portion of the lower layer side stacked body stacked on the foundation layer is patterned into a stairstep configuration. The upper layer side stacked body is provided on a lower level portion of the lower layer side stacked body stacked in the first contact region. The upper layer side stacked body includes a plurality of conductive layers stacked alternately with a plurality of insulating layers.

Semiconductor device and method for manufacturing same

To provide a technology capable of maintaining the consistency of a managed object even when an existing operation program is used for manipulation without modifying the existing operation program when the managed object itself on an execution base is expanded. An operation consistency maintenance method for an operation consistency maintenance system which maintains operation consistency of an application which operates on an application server comprises reading, from a storage device, manipulation control information indicating a manipulation control method when middleware is manipulated from an application operation program, and transmitting a call for inhibiting a manipulation request or for changing a calling operation function based on the read manipulation control information to the application server by a communication device; and receiving the call by the application server by means of the communication device, and calling either an application operation function or a middleware operation function indicated by the received call.

Growing community of inventors

Kawasaki, Japan

Hiroyuki Maeda