Kabushiki Kaisha Toshiba

Kioxia Corporation

Other

Infineon Technologies Ag

Toshiba Memory Corporation

Matsushita Electric Industrial Co., Ltd.

Hiroyuki Kanaya

Iwao Kunishima

Osamu Hidaka

Yoshinori Kumura

Koji Yamakawa

Hiroshi Mochizuki

Katsuaki Natori

Tohru Ozaki

Kumi Okuwada

Toyota Morimoto

Tsuyoshi Iwamoto

Susumu Shuto

Hiroshi Itokawa

Keisuke Nakazawa

Soichi Yamazaki

Masahiko Nakayama

Kazuyuki Miya

Keiji Hosotani

Haoren Zhuang

Kazuhiro Tomioka

Hiroyuki Takenaka

Norihisa Arai

Tomio Katata

Andreas Hilliger

Kuniaki Sugiura

Ulrich Egger

Hideyuki Sugiyama

Yasuyuki Taniguchi

Rina Nomoto

Roland Go

Sumito Ootsuki

Takeshi Kajiyama

Yukiteru Matsui

Shinichi Watanabe

Keisuke Nakatsuka

Katsuyuki Fujita

Jingyu Lian

Yoshiro Shimojo

Yoshikuni Tateyama

Osamu Arisumi

Masayoshi Iwayama

Yoshihiro Minami

Dong Jun Kim

Takeo Kubota

Takeshi Iwasaki

Stefan Gernhardt

Sung Hoon Lee

Shintaro Sakai

Soichi Oikawa

Yukinori Koyama

Yoshinoru Kumura

Kenji Fukuda

Yusuke Muto

According to one embodiment, a magnetic device includes a layered body with a first magnetic layer, a second magnetic layer, and a first non-magnetic layer between the first magnetic body and the second magnetic body. A side wall layer covers at least a side wall of the first non-magnetic body of the layered body and includes at least one first substance chosen from silicon oxide, zirconium oxide, aluminum oxide, aluminum nitride, and silicon nitride, and at least one second substance chosen from arsenic, tellurium, antimony, bismuth, and germanium.

Magnetic device and magnetic storage device

According to one embodiment, a memory device includes a first memory cell, a second memory cell adjacent to the first memory cell in a first direction, and a third memory cell adjacent to the first memory cell in a second direction, each of the first, second, and third memory cells including a resistance change memory element and a switching element. The switching element includes first and second electrodes, and a switching material layer between the first and second electrodes, the first and second electrodes overlap each other when viewed from the first direction, the first electrodes in the first and second memory cells are apart from each other, and the switching material layers in the first and second memory cells are continuously provided.

Memory device

A storage device includes a memory cell including a variable resistance element and a switching element having snapback current-voltage characteristics. The switching element includes a first conductive layer in contact with the variable resistance element, a second conductive layer, and a switching layer provided between the first conductive layer and the second conductive layer. The switching layer includes at least one switching member and a first insulating layer having a thermal conductivity higher than 1.4 W/m/K. A cross-sectional area of the switching member at a connection surface between the switching layer and the first conductive layer and a cross-sectional area of the switching member at a connection surface between the switching layer and the second conductive layer are each smaller than a cross-sectional area at a connection surface between the first conductive layer and the variable resistance element.

Storage device

According to one embodiment, a magnetic memory device includes first and second wirings, and memory cells between the first and second wirings, and each including a switching element and a magnetoresistance effect element, the switching element being connected to a first wiring, and the magnetoresistance effect element being connected to a second wiring. The switching element includes a bottom electrode, a top electrode, and a switching material layer between the bottom and top electrodes, and the bottom electrode included in each of the memory cells adjacent to each other in a first direction is continuously provided on the first wiring connecting the memory cells adjacent to each other in the first direction.

Magnetic memory device having an electrode continuously provided on a wiring

A semiconductor memory device has a first wiring extending in a first direction and a second wiring extending in a second direction. The first and second wirings are spaced from each other in a third direction. The second wiring has a first recess facing the first wiring. A resistance change memory element is connected between the first and second wirings. A conductive layer is between the resistance change memory element and the second wiring and includes a first protrusion facing the second wiring. A switching portion is between the conductive layer and the second wiring and includes a second recess facing the conductive layer and a second protrusion facing the second wiring. The first protrusion is in the second recess. The second protrusion is in the first recess. The switching portion is configured to switch conductivity state according to voltage between the first wiring and the second wiring.

Semiconductor memory device with resistance change memory element and manufacturing method of semiconductor memory device with resistance change memory element

According to one embodiment, a magnetoresistive memory device includes bottom electrodes provided on a substrate, a magnetoresistive element provided on each of the bottom electrodes, a top electrode provided on each of the magnetoresistive elements, an insulating film provided on sides of the bottom electrode, the magnetoresistive element and, the top electrode, and a magnetic layer provided on the top electrode, the magnetic layer extending on the insulating film to connect a plurality of those of the top electrodes.

Magnetoresistive memory device and manufacturing method of the same

According to one embodiment, a magnetoresistive memory device includes first electrodes located in an interlayer insulating film, second electrodes located on the respective first electrodes within the interlayer insulating film, magnetoresistive effect elements on the respective second electrodes, and third electrodes on the respective magnetoresistive effect elements. The first electrodes and the second electrodes are displaced from each other.

According to an embodiment, a magnetic storage device includes a semiconductor region including a trench; a gate electrode disposed in the trench; an insulation film covering the gate electrode and provided in a manner to fill the trench; and a magnetoresistive effect element including at least a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer provided between the first ferromagnetic layer and the second ferromagnetic layer, the non-magnetic layer in a side surface of the magnetoresistive effect element including the non-magnetic layer being provided on a top surface of the insulation film.

Magnetic storage device

According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes an underlying structure having conductivity provided on the substrate and including a first layer with a polycrystalline structure and a second layer with an amorphous structure, and a magnetoresistive element provide on the underlying layer. The magnetoresistive element includes a first magnetic layer provided on the underlying layer, a non-magnetic layer provided on the first magnetic layer, and a second magnetic layer provided on the non-magnetic layer.

Magnetic memory and method for manufacturing the same

According to one embodiment, a magnetic random access memory includes a magnetoresistive element, a contact arranged under the magnetoresistive element and connected to the magnetoresistive element, and an insulating film continuously formed from a periphery of the contact to a side surface of the magnetoresistive element and including a protective portion covering the side surface of the magnetoresistive element.

Magnetic random access memory

A semiconductor memory device according to embodiments includes a semiconductor substrate and plural switching transistors provided on the semiconductor substrate. In the semiconductor memory device, a contact plug is embedded between adjacent two of the switching transistors, and is insulated from gates of the adjacent two switching transistors. The contact plug is also electrically connected to a source or a drain of each of the adjacent two switching transistors, and an upper surface of the contact plug is at a position higher than an upper surface of the switching transistors. A memory element is provided on the upper surface of the contact plug and stores data. A wiring is provided on the memory element.

Semiconductor memory device and manufacturing method thereof

According to one embodiment, a magnetic memory includes a cell transistor including a first source/drain diffusion layer and a second source/drain diffusion layer, a first contact on the first source/drain diffusion layer, a memory element on the first contact, and a second contact on the second source/drain diffusion layer, the second contact including a first plug on the second source/drain diffusion layer, and a second plug on the first plug.

Magnetic memory and manufacturing method thereof

An aspect of the present embodiment, there is provided magnetic random access memory device including a semiconductor substrate, a selection transistor on the semiconductor substrate, the selection transistor including a diffusion layer, a contact plug on diffusion layer, an amorphous film on the contact plug, a lower electrode provided on the amorphous film, a first magnetic layer, a nonmagnetic layer, a second magnetic layer, an upper electrode stacked in an order and a sidewall contact film on the contact plug, the sidewall contact film being in contact with a sidewall of the upper electrode.

Magnetic random access memory and a method of fabricating the same

A memory includes a semiconductor substrate. Cell transistors are on the substrate. Contact plugs each of which is buried between the adjacent cell transistors and electrically connected to a diffusion layer between the adjacent cell transistors. An interlayer dielectric film buries gaps between the contact plugs. A storage element is provided not above the contact plugs but above the interlayer dielectric film. A sidewall film covers a part of a side surface of the storage element, and is provided to overlap with one of the contact plugs as viewed from above a surface of the semiconductor substrate. A lower electrode is provided between a bottom of the storage element and the interlayer dielectric film and between the sidewall film and one of the contact plugs, and electrically connects the storage element to one of the contact plugs.

Semiconductor storage device and manufacturing method thereof

A semiconductor storage device according to the present embodiment includes a selection element formed on a surface of a semiconductor substrate. A lower electrode is connected to the selection element. A magnetic tunnel junction element is provided on the lower electrode. An upper electrode is provided on the magnetic tunnel junction element. A growth layer is provided on the upper electrode and is composed of a conductive material and has a larger area than the upper electrode when viewed from above the surface of the semiconductor substrate. A wiring line is provided on the growth layer.

Semiconductor storage device and method of manufacturing the same

Growing community of inventors

Yokohama, Japan

Hiroyuki Kanaya