Sandisk Technologies Inc.

Hiroyuki Kamiya

Shinsuke Yada

Seiji Shimabukuro

Kensuke Yamaguchi

Shigehisa Inoue

Takashi Yuda

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening extending through the alternating sack, and a memory opening fill structure located within the memory opening. The memory opening fill structure includes a pedestal channel portion, a memory film overlying the pedestal channel portion, a vertical semiconductor channel located inside the memory film, and a channel connection strap that extends through an opening of the memory film and contacting the pedestal channel portion and the vertical semiconductor channel. The channel connection strap has a topmost surface located below a horizontal plane including a top surface of the vertical semiconductor channel. The channel connection strap portion may be formed by a selective semiconductor growth from physically exposed semiconductor surfaces, and may provide enhanced electrical connection between the pedestal channel portion and the vertical semiconductor channel.

Three-dimensional memory device containing a channel connection strap and method for making the same

An alternating stack of insulating layers including a silicon oxide material and electrically conductive layers is formed over a substrate. Sidewalls of the insulating layers are selectively silylated with a chemical including at least one silyl group without silylating sidewalls of the electrically conductive layers. Silicon-containing barrier material portions are formed by selectively growing a first silicon-containing barrier material from surfaces of the electrically conductive layers without growing the first silicon-containing barrier material from silylated surfaces of the insulating layers. A memory material layer is formed on the silicon-containing barrier material portions and the sidewalls of the insulating layers. A vertical conductive line is formed on the memory material layer.

Three-dimensional resistive random access memory device containing selectively grown amorphous silicon-containing barrier and method of making the same

Methods of fabricating semiconductor devices, such as monolithic three-dimensional NAND memory string devices, include selectively forming semiconductor material charge storage regions over first material layers exposed on a sidewall of a front side opening extending through a stack comprising an alternating plurality of first and second material layers using a difference in incubation time for the semiconductor material on the first material relative to an incubation time for the semiconductor material on the second material of the stack. In other embodiments, a silicon layer is selectively deposited on silicon nitride on a surface having at least one first portion including silicon oxide and at least one second portion including silicon nitride using a difference in an incubation time for the silicon on silicon nitride relative to an incubation time for the silicon on silicon oxide.

Methods of fabricating memory device with spaced-apart semiconductor charge storage regions

A method of forming a three-dimensional memory device includes forming a stack of alternating first and second material layers over a substrate, forming a memory opening through the stack, forming a memory film and a semiconductor channel in the memory opening, and forming backside recesses by removing the second material layers selective to the first material layers and the memory film, where an outer sidewall of the memory film is physically exposed within each backside recess. The method also includes forming at least one set of surfaces selected from silicon deposition inhibiting surfaces on the first material layers and silicon deposition promoting surfaces over the memory film in the back side recesses, selectively growing a silicon-containing semiconductor portion laterally within each backside recess, forming at least one blocking dielectric within the backside recesses, and forming conductive material layers by depositing a conductive material within the backside recesses.

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Yokkaichi, Japan

Hiroyuki Kamiya