Nihon Dempa Kogyo Co., Ltd.

Hiroyuki Demura

Yasuo Kitayama

Naoki Onishi

Kaoru Kobayashi

The present invention provides a frequency synthesizer that is switchable at a high speed and includes a few unnecessary frequency components in an output frequency signal. In a frequency synthesizer, a DDSoperates based on a clock signal to generate a reference frequency signal with a predetermined reference frequency, and clock signal supply unitsandswitch the clock signals that have different clock frequencies to supply to the DDS. When the clock signals are switched to operate the DDS, the storage unitstores a combination of a clock frequency f, a reference frequency f, and a dividing number N in association with an output frequency fof the frequency synthesizersuch that a spurious frequency does not exist within a predetermined frequency range and a dividing number of a variable frequency dividerdisposed on a PLL circuitis minimum. Setting unitsandread setting items stored in the storage unitto set respective units.

Frequency synthesizer

To provide, in a frequency synthesizer including: a variable attenuator provided at a subsequent stage of a voltage controlled oscillator; a detector; and a control unit outputting a control voltage for adjusting an attenuation amount of the variable attenuator via a digital/analog converter in accordance with a detection voltage, a technology with which a spurious due to a change in an output of the digital/analog converter can be suppressed. A low-pass filter is provided between an output side of a digital/analog converter and a variable attenuator to cut a frequency component corresponding to an overshoot generated when an output of the digital/analog converter is changed. Further, a period of time from when a control unit outputs a control voltage to when it reads a signal level detected by a detector is set to a period of time longer than a time constant of the low-pass filter determined by a cut-off frequency of the low-pass filter so that no influence is exerted on an operation of automatically controlling the signal level.

Signal level adjusting device and high-frequency apparatus

A low noise voltage-controlled oscillating circuit which can remove a power source noise to improve low frequency noise characteristics is disclosed. A capacitor Cis provided between a base of a driving transistor Qand GND, whereby a low frequency noise input into the base can be removed. As the driving transistor Q, a transistor having a low hFE is used, whereby the low frequency noise input from a power source can be removed. A coil Lis provided on the emitter side of an oscillating transistor Q, whereby broadband frequency characteristics can be obtained to improve phase noise frequency characteristics. On the emitter side of the oscillating transistor Q, a resonance frequency in a resonant circuit having a capacitor Cand the coil Lis set near the center of a VCO oscillation frequency band, whereby it is possible to obtain the oscillation frequency which is not easily influenced by the noise.

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Saitama, Japan

Hiroyuki Demura