Renesas Technology Corp.

Renasas Technology Corporation

Hiroyuki Adachi

Masayuki Sato

Kiyoshi Aiki

Masayoshi Okamoto

Kazunori Hikone

Masao Onose

Yuji Mizuno

A semiconductor integrated circuit device is provided in which (i) inspection pads are arranged along one side or two opposite sides of the semiconductor integrated circuit device for bonding pads arranged along the sides other than the side or the two opposite sides and (ii) the bonding pads are connected to their respective inspection pads by connection wires The inspection is carried out by applying probe needles to the pads (inspection pads and bonding pads) arranged only along one side or two opposite sides of the semiconductor integrated circuit device. The invention also provides a semiconductor integrated circuit package with leads on four sides includes a semiconductor integrated circuit device with bonding pads laid along one pair of opposite sides of the four sides, and a table for supporting the semiconductor integrated circuit device. While the bonding pads along the pair of opposite sides of the semiconductor integrated circuit device are connected with leads along the four sides of the package, and some leads are bent toward the respective pads. The present invention the inspection of a plurality of semiconductor integrated circuit devices with probe needles at a time.

Semiconductor integrated circuit device

A manufacturing method of a semiconductor integrated circuit device includes the steps of: providing wiring conductors capable of connecting between chips or devices and variable switching devices capable of connecting between predetermined wiring conductors on a wafer formed of a microcomputer built-in chip having a CPU and a writable memory circuit for storing an operation program or on a testing board provided with a microcomputer built-in device enclosed by a package; writing a testing program including the transmission and reception operation of signals between the devices or chips into the memory circuit re-writable and capable of using as a program storing area for one of the chips or devices; and executing the testing program in the CPU of the chip or device, thereby testing a testing chip, between the device and the testing chip or an input/output circuit of the device.

Manufacturing method of semiconductor integrated circuit device

Growing community of inventors

Koganei, Japan

Hiroyuki Adachi