Kabushiki Kaisha Toshiba

Toshiba Infrastructure Systems & Solutions Corporation

Hiroyuki Abe

Hironori Nagasawa

Shinichi Kurihara

Sunao Wada

Hideki Ueno

Shingo Yasunami

Yasuo Ooya

Yuri Komori

Norio Hosoi

Daisuke Takasaki

According to an embodiment, a client includes a street information collection unit for collecting street information near an arrangement place, a provision determination unit for determining whether the street information collected by the street information collection unit is information required to be provided to the server, and a first transmission unit for transmitting the street information, which is determined to be required to be provided by determination of the provision determination unit, to the server, with client identification information for identifying the client.

Street information processing system, client and server applied to street information processing system, and method and program of the same

A semiconductor switch circuit includes a switch between an input node and an output node that connects nodes to each other according to a control signal and a level shifter outputting the control signal at a boosted level that is greater than a power supply voltage level. The semiconductor switch circuit also includes a booster circuit to output a boosted voltage at the boosted level higher than a power supply voltage level. A control circuit is configured to control the level shifter output of the control signal to the switch. A capacitance switching circuit is included to change the capacitance of a connection between the booster circuit and the level shifter. The capacitance switching circuit can vary capacitance according to the voltage level of the booster circuit output.

Semiconductor switch circuit

A CMOS logic circuit includes a resistive element that is connected to a first voltage line at a first end thereof. The CMOS logic circuit includes a first inverter circuit having a first MOS transistor and a second MOS transistor. The CMOS logic circuit includes a second inverter circuit having a third MOS transistor and a fourth MOS transistor. The CMOS logic circuit includes a fifth MOS transistor that is connected in parallel with the resistive element between the first voltage line and the first end of the first MOS transistor and the gate of which is connected to the second end of the third MOS transistor. The CMOS logic circuit includes a sixth MOS transistor that is connected between the first voltage line and the first output terminal.

CMOS logic circuit

A power amplifier circuit disclosed herein comprises an amplifying part transistor including a bipolar transistor to which a first supply voltage is supplied as a driving voltage and which amplifies an input signal inputted to a base of the amplifying part transistor so as to output the input signal; a bias current generating circuit which generates a bias current for biasing the base of the amplifying part transistor and supplies the bias current to the base of the amplifying part transistor when the amplifying part transistor performs an amplification operation; and an additional bias current generating circuit which supplies an additional bias current to the base of the amplifying part transistor in addition to the bias current according to the first supply voltage.

Power amplifier circuit

There is disclosed a bias circuit of a bipolar transistor for the high frequency power amplification, and the bias circuit comprises a bipolar transistor for the temperature compensation, a resistor for the temperature compensation connected to a collector thereof, a field effect transistor, and a source resistor connected to a source thereof. The bias circuit comprises a two stage transistor circuit in which a connection point between the bipolar transistor and the resistor for the temperature compensation is connected to a gate of the field effect transistor, and an output voltage is taken out from a connection point between the source of the field effect transistor and the source resistor. In this bias circuit, the thermal runaway resulting from a temperature rise can be prevented, and a large high frequency output can be obtained in a non-linear operation region of the high frequency input power&mdash;output power characteristic.

Bias circuit of a bipolar transistor for high frequency power amplification

A feedback type variable gain amplifier of the present invention is provided with a first inductor and a first field effect transistor connected in series across a power-supply potential terminal and a ground potential terminal, the one end of the first inductor connecting to the power-supply potential terminal, the one end of the first field effect transistor connecting to the ground potential terminal, the gate of the first field effect transistor being used as a signal input terminal, and the other end of the first field effect transistor being used as a signal output terminal, a second inductor, a second field effect transistor and a capacitor connected in series between the drain and the gate of the first field effect transistor, and, a resistor connected between the drain and the gate of said second field effect transistor.

Growing community of inventors

Kanagawa, Japan

Hiroyuki Abe