Hitachi, Ltd.

Renesas Technology Corp.

Other

Hitachi Cable, Inc.

Hiroyoshi Kokaku

Masanori Segawa

Asao Nishimura

Kunihiro Tsubosaki

Makoto Kitano

Masatsugu Ogata

Hiroshi Hozoji

Hiroshi Kikuchi

Kunihiko Nishi

Takashi Yokoyama

Gen Murakami

Akio Hasebe

Akihiro Yaguchi

Takashi Yamazaki

Kazuyoshi Oshima

Masahiro Ichitani

Aizo Kaneda

Junichi Saeki

Shozo Nakamura

Isamu Yoshida

Sueo Kawai

Noriyuki Kinjo

Syuuji Eguchi

Ichiro Anjoh

Ichiro Anjo

Tetsuro Matsumoto

Akira Nagai

Shuji Eguchi

Tetsurou Matsumoto

Masahiko Ogino

Toshiaki Ishii

Nobutake Tsuyuno

Chuichi Miyazaki

Takumi Ueno

Mamoru Mita

Norio Okabe

Rie Hattori

Makoto Morishima

Toshiak Ishii

Toshiya Satoh

Tadanori Segawa

Ryo Moteki

Yutaka Ito

Akio Mukoh

Satoshi Nakamura

Takao Miwa

Fusaji Shoji

Takayuki Nakakawaji

Atsushi Kakuta

Tsuneaki Kawanishi

Shigeki Komatsuzaki

Akio Nishikawa

Hideki Asano

Shigeo Suzuki

Fumio Sato

Hisashi Kohkame

Ryuichi Shimizu

Yasuhide Sugawara

Kenichi Saida

Katsuhito Suzuki

Ogino Masahiko

Ryou Moteki

Mitsuoshi Shoji

Koiti Kakefuda

Semiconductor devices,-semiconductor wafers, and semiconductor modules are provided: wherein the semiconductor device has a small warp; damages at chip edge and cracks in a dropping test are scarcely generated; and the semiconductor device is superior in mounting reliability and mass producibility. The semiconductor devicecomprising: a semiconductor chipa porous stress relaxing layerprovided on the plane, whereon circuits and electrodes are formed, of the semiconductor chip; a circuit layerprovided on the stress relaxing layer and connected to the electrodes; and external terminalsprovided on the circuit layer; wherein an organic protecting filmis formed on the plane, opposite to the stress relaxing layer, of the semiconductor chip, and respective side planes of the stress relaxing layer, the semiconductor chipand the protecting filmare exposed outside on a same plane.

Semiconductor device, semiconductor wafer, semiconductor module, and a method of manufacturing semiconductor device

A semiconductor device having a superior connection reliability is obtained by providing a buffer body for absorbing the difference of thermal expansion between the mounting substrate and the semiconductor element in a semiconductor package structure, even if an organic material is used for the mounting substrate. A film material is used as the body for buffering the thermal stress generated by the difference in thermal expansion between the mounting substrate and the semiconductor element. The film material has modulus of elasticity of at least 1 MPa in the reflow temperature range (200&#x2013;250&#xb0; C.).

Circuit tape having adhesive film semiconductor device and a method for manufacturing the same

In a semiconductor device having a three-layered buffer layer comprising core layerhaving interconnected foams such as a three-dimensional reticular structure and adhesive layersprovided on both sides of the core layer as a stress buffer layer between semiconductor chipand wiringto lessen a thermal stress generated between the semiconductor device and the package substrate, where a thickness ratio of the core layerto total buffer layer is at least 0.2, the production process can be simplified by using such a buffer layer, thereby improving the mass production capacity and enhancing the package reliability.

Wiring tape for semiconductor device including a buffer layer having interconnected foams

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the 'Lead-On-Chip' or 'Chip-On-Lead' structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Semiconductor device

Semiconductor devices, semiconductor wafers, and semiconductor modules are provided, wherein: the semiconductor device has a small warp; damage at the chip edge and cracks occurring in a dropping test are scarcely generated; and the semiconductor device is superior in mounting reliability and mass producibility. The semiconductor includes a semiconductor chip; a porous stress relaxing layerprovided on the plane, whereon circuits and electrodes are formed, of the semiconductor chip; a circuit layerprovided on the stress relaxing layer and connected to the electrodes; and external terminalsprovided on the circuit layer; wherein an organic protecting filmis formed on the plane, opposite to the stress relaxing layer, of the semiconductor chip, and respective side planes of the stress relaxing layer, the semiconductor chip, and the protecting filmare exposed outside on the same plane.

The present invention provides a biphenyl based epoxy resin comprising a curing agent and an inorganic filler containing an alkali alkaline earth metal oxide wherein the epoxy resin has a variation rate of hardness at 25&#xb0; C. and a relative humidity of 50% for 72 hours of less than 10% and a variation rate of flow at 25&#xb0; C. and a relative humidity of 20% or below for 72 hours of less than 20%.

Epoxy resin composition for semiconductor encapsulation and semiconductor device using the same

A semiconductor device having a superior connection reliability is obtained by providing a buffer body for absorbing the difference of thermal expansion between the mounting substrate and the semiconductor element in a semiconductor package structure, even if an organic material is used for mounting substrate. A film material is used as the body for buffering the thermal stress generated by the difference in thermal expansion between the mounting substrate and the semiconductor element. The film material has modulus of elasticity of at least 1 MPa in the reflow temperature range (200-250&deg; C.).

Circuit tape having adhesive film, semiconductor device, and a method for manufacturing the same

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the &ldquo;Lead-On-Chip&rdquo; or &ldquo;Chip-On-Lead&rdquo; structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

In a semiconductor device having a three-layered buffer layer comprising core layer having interconnected foams such as a three-dimensional reticular structure and adhesive layers provided on both sides of the core layer as a stress buffer layer between semiconductor chip and wiring to lessen a thermal stress generated between the semiconductor device and the package substrate, where a thickness ratio of core layer to total buffer layer is at least 0.2, the production process can be simplified by using such a buffer layer, thereby improving the mass production capacity and enhancing the package reliability.

Semiconductor device having a porous buffer layer for semiconductor device

Semiconductor device including a resin sealing member which exposes the

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Hitachi, Japan

Hiroyoshi Kokaku