Lapis Semiconductor Co., Ltd.

Lapis Technology Co., Ltd.

Oki Semiconductor Co., Ltd.

Hiroyoshi Ichikura

Hideaki Hasegawa

Naoya Kimura

Hiroki Aizawa

Takeshi Nosaka

Daisuke Tanaka

Koji Higuchi

Koji Yamazaki

Kunihiro Harayama

Kazuhide Aoyama

A semiconductor device includes a gradation voltage generation circuit, output amplifier circuits, a drive control circuit, and a delay time measurement circuit. The gradation voltage generation circuit converts, according to a load signal, pixel data pieces into gradation voltages and outputs the gradation voltages. The output amplifier circuits generate drive signals by individually amplifying the gradation voltages, and output the drive signals to data lines. The drive control circuit outputs the load signal to the gradation voltage generation circuit according to a horizontal synchronization signal. The delay time measurement circuit obtains, as a measured delay time, a time from receiving the measurement start signal until a voltage value of the drive signal outputted from one of the output amplifier circuits exceeds a predetermined threshold voltage. The drive control circuit shifts a timing of outputting the load signal by a difference between the measured delay time and a reference delay time.

Semiconductor device, display driver, and display device

A display driving device includes a high voltage operating unit obtaining an operating current according to the application of the high power supply voltage from the first voltage application line; a low voltage operating unit that operates according to an application of a low power supply voltage to control the high voltage operating unit; a recycling circuit that receives the operating current from the high voltage operating unit via a relay coupling line and applies the low power supply voltage to the low voltage operating unit while supplying the received operating current to a reference potential line via the low voltage operating unit; and a current bypass circuit that flows a part of the operating current flowing through the relay coupling line into the reference potential line without supplying the part of the operating current to the recycling circuit according to a voltage increase in the low power supply voltage.

Display driving device

A display driver includes an amplifier circuit that outputs an output current based on a differential signal indicating a difference between a gradation voltage corresponding to a video signal and an output voltage to a source line of a display panel, thereby supplying the output voltage to the source line. An output current detection circuit generates a mirror current by copying the output current, and outputs an output current detection signal representing the mirror current. A failure determination circuit determines whether a failure is occurring or has occurred in the source line or not by comparing the level of the output current detection signal with a prescribed threshold value. The output current detection circuit includes a transistor that generates a mirror current by receiving the differential signal at a gate thereof, and a variable resistance that generates an output current detection signal upon receiving the generated mirror current.

Display driver and display device

A display driver drives a display device including a plurality of data lines and a demultiplexer. The demultiplexer includes a plurality of first switches connected to the respective plurality of data lines, and a series of driving voltages including a plurality of driving voltages is supplied via a first wiring. The demultiplexer supplies the plurality of driving voltages to the respective plurality of data lines via the plurality of first switches. The display driver includes: a voltage multiplexing part that generates the series of driving voltages; a second switch connected between the voltage multiplexing part and the first wiring; and a controller connected to the plurality of first switches and the second switch. The controller switches the second switch from an on state to an off state during a first period and sets the two first switches corresponding to the two data lines to the on state such that the two data lines and the first wiring are connected during a second period that is a part of the first period and in which the second switch is in the off state.

Display driver and display apparatus

An operational amplifier has a first input terminal and an output terminal connected to a second input terminal of the operational amplifier, and output nodes connected to the source lines of a display panel. During a failure inspection mode, the connection between the output node and the output terminal of the operational amplifier included in another output circuit among one output circuit and the other output circuit is disconnected and the output node instead of the output terminal is connected to the second input terminal of the operational amplifier. A pair of source lines connected to the output nodes of the one output circuit and the other output circuit are linked to each other, and signals attained by acquiring and binarizing voltages outputted from the operational amplifier in the other output circuit as a monitor voltage at different timings are acquired as first and second failure determination signals.

Display device, display driver, and failure inspection method

A display driving device comprising: a high supply voltage operation unit that generates an operating current under application of a high supply voltage so as to supply driving voltages to a display panel; a low supply voltage operation unit that operates under the application of a low supply voltage lower than the high supply voltage and controls the high supply voltage operation unit; and a reuse circuit that receives the operating current from the high supply voltage operation unit and supplies the operating current to a ground side via the low supply voltage operation unit so as to apply the low supply voltage to the low supply voltage operation unit.

A dummy bump electrode for heat-dissipating is provided on a surface of a semiconductor chip. The semiconductor chip is mounted on a wiring substrate. A lead line is formed on the wiring substrate. The heat-dissipating bump electrode and a lead line are connected to each other through a heat dissipation pattern, thereby efficiency of the heat dissipation is improved.

Heat dissipation bump electrode for chip on film

An amplifying circuit includes a first differential amplifier (first differential pair) and a second differential amplifier (second differential pair) having an input capacitance smaller than the first differential amplifier. The amplifying circuit switches between the first differential amplifier (first differential pair) and the second differential amplifier (second differential pair) in response to an amplification mode setting signal to perform amplification processing of an input signal.

Amplifying circuit

A data processing apparatus includes an inputting portion; a first retrieving portion; a second retrieving portion; a clock determining portion; a first serial parallel converting portion; a second serial parallel converting portion; and a combining portion. The inputting portion receives a serial data including a clock bit. The first retrieving portion obtains a first retrieved data. The second retrieving portion obtains a second retrieved data. The clock determining portion determines whether the clock bit is included in the first retrieved data or the second retrieved data. The first serial parallel converting portion performs parallel conversion to obtain a first parallel data. The second serial parallel converting portion performs parallel conversion to obtain a second parallel data. The combining portion combines the first parallel data and the second parallel data to output a parallel data.

Data processing apparatus and method of processing data

There is provided a driving device of a display device, including: a first switching portion; a second switching portion; and a control section that, when the potential of a drive signal line is lower than a target potential, operates the first switching portion by using, as a first reference potential, a potential that is less than or equal to the target potential and that is closest to the target potential, among predetermined n types (n&#x2267;1) of potentials, and, when the potential of the drive signal line is higher than the target potential, operates the second switching portion by using, as a second reference potential, a potential that is greater than or equal to the target potential and that is closest to the target potential, among the n types of potentials.

Driving device of display device

An offset-reducing output circuit of a source driver adapted to drive a liquid crystal device. The output circuit includes an operational amplifier having a non-inverting input to receive a reference voltage. The output circuit also includes input and output capacitors. One terminal of the input capacitor and one terminal of the output capacitor are connected to a node extending to an inverting input of the operational amplifier in at least a normal output operation mode. The output circuit also includes a switching circuit to short both terminals of the input capacitor and both terminals of the output capacitor in a reset operation so that the reference voltage is applied to the terminals of the input and output capacitors respectively. The switching device applies a gray scale voltage to an opposite terminal of the input capacitor in a normal operation mode.

Output circuit for reducing offset for use in source driver adapted to drive liquid crystal device

A voltage output device capable of preventing an increase in circuit scale includes an offset compensation function and is suitably applicable to a drive circuit for display devices. The voltage output device includes an operational amplifier having an inverting input terminal and a non-inverting input terminal. Resistance values of a load resistor on the inverting input side and a load resistor on the non-inverting input side are maintained when the output voltage of the amplifier has changed while sequentially varying either one or both of the resistance values of the load resistor on the inverting input side and the load resistor on the non-inverting input side in a state that the inverting input terminal and the non-inverting input terminal are connected. The voltage output device is configured to output the output voltage of the amplifier with the inverting input terminal not connected to the non-inverting input terminal.

Voltage output device having an operational amplifier

A minute capacitance element has a high accuracy capacitance and is resistant to external noises. The minute capacitance element includes: first and second metal electrodes having respective opposite facets facing each other formed on an insulator layer to define a first gap therebetween; and a shield electrode being connectable to an externally applied potential and formed on the insulator layer within the first gap to define a slit confining a synthetic capacitance.

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Ibaraki, Japan

Hiroyoshi Ichikura