Nippondenso Co., Ltd.

Hiroyasu Ito

Norihito Tokura

Kunihiko Hara

Naoto Okabe

Hironari Kuno

Hirohiko Saito

This invention is basically related to an insulated gate bipolar transistor comprising a first conductivity type semiconductor substrate, a second conductivity type semiconductor layer formed on the substrate and having a low concentration of impurities, a first conductivity type base layer formed on a surface of the semiconductor layer, a second conductivity type source layer formed on the surface of the base layer and having a channel region at at least one end thereof, a gate electrode, a source electrode and a drain electrode, and is characterized in that a voltage dropping portion is provided either inside the source layer or between the source layer and the source electrode. Accordingly an insulated gate bipolar semiconductor transistor having this configuration can prevent a latch up phenomenon caused by a voltage drop in a source layer.

Insulated gate bipolar transistor

A semiconductor device with a current detecting function in which in place of an external resistor for detecting an operation current such as drain current or collector current of a device such as an FET or bipolar transistor, a probe electrode is formed in proximity to the device depletion layer to connect therethrough with the device channel to generate a probe voltage corresponding to the operation current.

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Kariya, Japan

Hiroyasu Ito