Yamaha Corporation

Hirotoshi Tsuchiya

Tatsuya Kishii

Masato Miyazaki

Masayoshi Nakamura

Shinji Yaezawa

Akihisa Himeno

Masayuki Iwamatsu

Toshio Maejima

Katsuya Hirano

Moritaka Iyoda

Yuya Hashimoto

Toru Nakamori

A dynamic range compression circuit includes an attenuator that attenuates a signal at a predetermined node in an amplifier to reduce a gain of the amplifier and a gain controller that reduces the gain of the amplifier by the attenuator so that an amplitude of an output signal of the amplifier becomes an arbitrary output limit voltage in a case where an input signal having the same amplitude as that of an input-stage maximum voltage of the amplifier is input into the amplifier, and increases the gain of the amplifier by reducing a degree of attenuation of the attenuator according to a decrease of the amplitude of the input signal of the amplifier from the input-stage maximum voltage in a case where the amplitude of the input signal of the amplifier is smaller than the input-stage maximum voltage.

Dynamic range compression circuit and class D amplifier

A class-D amplifier circuit includes an amplifier that generates pulse-width modulated output signals according to input signals which have phases reverse to each other and are supplied to a first input end and a second input end, a first transistor interposed between a first input path extending from the first input end to the amplifier and a second input path extending from the second input end to the amplifier, and a voltage applying circuit that applies a control voltage corresponding to a predetermined value to a control terminal of the first transistor so that a current flowing between both ends of the first transistor increases in accordance with increase of levels of the input signals within a range in which the levels of the input signals are higher than the predetermined value.

Class-D amplifier circuit

A class-D amplifier for generating from an input signal a digital signal for driving a load, includes an output limit instruction generating section that detects that the digital signal falls outside a limit range and that outputs an output limit instruction signal, an attenuation instruction pulse generating section that includes an integrator for integrating the output limit instruction signal and that outputs a periodical attenuation instruction pulse having pulse width corresponding to an integrated value in the integrator, an attenuating section provided in an input path for the input signal and that attenuates the input signal based on the attenuation instruction pulse, and a mute control section that controls the integrated value in the integrator independently of the output limit instruction signal to control an amount of the attenuation of the attenuating section applied to the input signal.

Class-D amplifier

An amplifying device includes a selecting section that selects one of a first power source potential and a second power source potential which are different from each other, a potential generating circuit that generates a third power source potential from the power source potential selected by the selecting section, an amplifier that operates with supply of the first power source potential and the third power source potential, and a controlling circuit that variably controls a target to be selected by the selecting section in accordance with at least one of an amplitude of a signal on an input side of the amplifier, an amplitude of a signal on an output side of the amplifier, and the third power source potential.

Amplifying device

A class-D amplifier includes a differential integrator that integrates a difference between an input signal and a feedback signal to output an integration value signal, a pulse width modulation circuit that outputs a digital signal having a pulse width corresponding to a level of the integration value signal, an output buffer that drives a load based on the digital signal, a feedback section that feeds an output signal of the output buffer into the differential integrator as the feedback signal, a clamp section that performs a clamping of limiting the level of the integration value signal within a specified level range, an attenuation section that attenuates the level of the input signal to be input to the differential integrator in response to an attenuation command, and an attenuation control section that outputs the attenuation command to the attenuation section in response to the clamping performed by the clamp section.

An amplifier includes: an operation amplifier including a positive input terminal and a negative input terminal; and a detector which detects that a difference between a voltage of the positive input terminal and a voltage of the negative input terminal is equal to or exceeds a predetermined value and outputs a detection signal.

Amplifier

A differential amplifier includes: a constant current source; first and second field effect transistors whose respective gates are imparted with positive-phase and negative-phase input signals and whose sources commonly connected to each other, the constant current source being connected to a common node of the sources; first and second loads serving as current paths for respective drain currents of the first and second field effect transistors; an amplifying unit which outputs positive-phase and negative-phase output signals which are amplified in response to the respective drain voltages of the first and second field effect transistors; and a current path generator which generates first and second current paths parallel to the respective first and second field effect transistors for a predetermined period of time at the time of start-up of the differential amplifier.

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Fukuroi, Japan

Hirotoshi Tsuchiya