Hitachi, Ltd.

Nippon Telegraph and Telephone Public Corporation

Hirotoshi Shirasu

Eiichi Amada

Taihei Suzuki

Hiroshi Kuwahara

Takashi Morita

Toshiro Suzuki

Yukihito Maejima

Yuichi Morikawa

Hirotaka Usuda

Tohru Kazawa

Kazuo Saito

Kazuo Yamakido

Takanori Miyamoto

Makoto Ohnishi

Shirou Tanabe

Tatsuya Kameyama

Hiroshi Takatori

Takuji Mukaemachi

Hiroshi Kosugi

Hidetaka Yamashita

Takeshi Fukuhara

Yoshiaki Tokita

Tatsumasa Oonuma

Hirofumi Inoue

Hirohiko Sato

Toshiaki Yamamoto

A data driven type instruction execution method for controlling execution of instructions by using a memory storing an input data available source, an output message destination to which the results of the operation performed are sent and an input data number counters for indicating availability of the input data to each of the instructions. A flag indicating the number of input data required for each instruction is not less than two, an input data number counter for the instruction requiring two or more input data and an initialization table for setting an initial value of the counter. The content of the flag is referred and deciding that the instruction can be executed when the flag indicates the input data number of one. The input data counter is decremented when the input data number is two or more, and deciding that the instruction can be executed when the decrement of the input data counter results in zero. Operation is executed starting from the instruction which the input data are complete, the result of the operation being informed to the output message destination. The instruction is registered in the queue when executable. Execution of the instruction is performed by taking out it from the queue.

Control system with flag indicating two or less data inputs and counter

An I/O prescription table (I/O PTBL) is associated with a processing program module that is executed by a conventional sequential execution type processor. Each processing program module fetches the input data according to its associated I/O PTBL and stores the output data in the same table. An execution control program makes reference to the I/O PTBL associated with the processing program module, updates the designated I/O PTBL so as to indicate that the corresponding input data is prepared, and starts the processing program module associated with the I/O PTBL which is furnished with all of the necessary input data.

Method and system for data driven information processing

A method and a system for bidirectional transmission/reception of data between two terminal stations, in which each transmission period is divided into a plurality of first time sections for relatively low speed data transmission and at least one second time section for relatively high speed data transmission, the direction of transmission between the terminal stations being predetermined in each of the first time sections, while the direction of transmission between the terminal stations is reversible in each of the second time sections, each second time section being preceded by one of the first time sections. Transmission of information data and control data is performed from one to the other terminal station in a predetermined direction in each first time section, and the direction of data transmission between the terminal stations in the next second time section is determined on the basis of control data contained in the relatively low speed data transmission.

Method and system for bidirectionally transmitting data

In a digital and electronic switching apparatus, each subscriber's circuit is provided with a loop back circuit which selectively return a downward channel signal to an upward channel in order that a ring back tone informing a calling telephone set of the fact that a called telephone set is being dialed can be synchronized with a ringing tone dialing a called telephone set. Upon dialing a called subscriber, the loop back circuit is ON-OFF controlled in synchronism with the ON-OFF control of the ringing tone so that a tone signal generated from a common continuous ring back tone source can be transmitted to the loop back circuit and the calling telephone set via a speech path of a switching network.

Ring back tone transmission system

This invention relates to a time division switching system for exchanging audio signals, data and so on in a time division manner. This time division switchboard comprises a plurality of separate local exchange units capable of interfacing with various different circuits such as subscriber lines, trunk lines, service circuits and so on, one or a plurality of junctor high ways connected to a time switch of each of the local exchange units, and one or a plurality of tandem exchange units each having a time switch connected to the other ends of the junctor high ways and switching by the time switch. Each of the local exchange units selects a channel on an arbitrary junctor high way and transmits control information concerning other one of the local exchange units to which a calling is to be sent, to one of the tandem exchange units which has the selected junctor high way connected thereto. The tandem exchange unit to which the control information is sent selects a channel on a junctor high way connected to the local exchange unit to which the call is to be sent, in response to the control information sent thereto, thereby switching the calling to the desired local exchange unit. Thus, since the respective units can be loosely coupled to each other, the time division switching system of this invention has high reliability and good economy.

Time division switching system

In an interface circuit which couples a two-wire line of bidirectional transmission and unidirectional four-wire receiving and transmitting lines; in order to permit the interface circuit to operate in adaptation to the fluctuation of an impedance with the two-wire line side viewed from the four-wire receiving line, the four-wire receiving line is provided with a plurality of filters and a group of switches for selecting the filters, an output of the four-wire transmitting line is compared with outputs obtained by scanning the filters, and the filter providing the minimum output difference in the comparisons is selected and connected.

Interface circuit interconnecting a bidirectional two-wire line with

In order to realize a system in which three or more subscriber parties can hold a conference, and a PCM decoder is also provided with a circuit which adds part of a received digital PCM signal on the input side of the PCM decoder to a PCM signal corresponding to the output of the PCM coder.

PCM coder and decoder

For the purpose of realizing a line circuit, especially a two-wire four-wire conversion circuit of a telephone exchange in the form of LSI and providing the conversion circuit with an impedance which is suitable to a side tone characteristic of the telephone set, in a line circuit composed of a hybrid circuit wherein the four-wire input line is connected to the two-wire subscriber line via a buffer amplifier and a terminating impedance and in addition the four-wire output line is connected to the output of a subtractor which subtracts an input signal of the four-wire input line passed through a filter circuit from a signal fed from the two-wire subscriber line, the terminating impedance is formed by a resistor component and in addition a feedback circuit having such a transfer characteristic that the impedance of the line circuit seen from the two-wire subscriber line side will become a specified complex impedance is installed between a line which couples the two-wire subscriber line to the subtractor and an input of the buffer amplifier.

Subscriber line interface circuit with complex impedance

A time-division switching unit for connecting a desired channel of a desired one of a plurality of input highways to a desired channel of a desired one of a plurality of output highways is disclosed. A frame synchronization circuit of the time-division switching unit variably delays signals of the input highways within one channel period, writes the signals to a speech memory for each channel, modifies write addresses to the speech memory to attain frame synchronization, extracts frame synchronization signals of the respective highways from the input and output of the speech memory, and controls the amount of delay within one channel period and the amount of address modification by the extracted synchronization signals.

Time-division switching unit

A signal processing apparatus for subscriber circuits is disclosed which comprises a plurality of circuits each for extracting a signal corresponding to a.c. and d.c. signals flowing through each of a plurality of subscriber circuits, an analog multiplexing circuit connected to the output terminal of each of the plurality of extracting circuits, an analog-to-digital converter connected to the output terminal of the analog multiplexing circuit, and a signal processing circuit connected to the output terminal of the analog-to-digital converter and receiving successively and periodically a digital signal corresponding to the output signal of each of the extracting circuits for processing the digital signal to detect the state of each of the subscriber circuits, the reception of the digital signal being made by sending a selective signal to the analog multiplexing circuit.

Signal processing apparatus for subscriber circuits

In a time-division-multiplexed exchanger having digital filters disposed in a channel system, a level adjuster wherein data for setting line losses corresponding to respective combinations of interconnections of a plurality of lines received at outgoing and incoming line terminals of the time-division-multiplexed exchanger are stored by storage means, and coefficients of the digital filters are controlled on the basis of the data at exchange operations, whereby the level adjustment is made.

Time-division-multiplexed exchanger

An interpolative PCM decoder converts PCM signals having polarity bits, segment selection bits and uniform quantization bits into an analog signal. The PCM decoder may be used both for .mu.-law and A-law conversion by use of simple circuits and includes an AND gate circuit which produces a logical product between a selection signal for selecting a minimum unit of an analog value of a lower end of a segment and a control signal for change-over between the .mu.-law and the A-law, and a circuit generating the same analog values as the minimum unit of the analog value in accordance with an output of the AND gate circuit.

Interpolative PCM decoder utilized for .mu.-law and A-law

A line identifying system for an automatic switching system of the common control type employs a line identifier adapted to be connected to any of a plurality of switch frames through a connector, which cuts off the operating circuit for a connector relay corresponding to a switch frame upon receipt of instructions from the line identifier and prepares the operating circuit of the connector relay corresponding to the switch frame upon receipt of instructions from a switch controller.

Line identifying system of common control type automatic exchange

A current supply system for terminal devices in which the line circuits are divided into groups in accordance with the line impedance thereof between an exchange or switching network and respective terminal devices or telephone sets, and a different voltage is applied to respective groups of line circuits which corresponds to the current matching the line impedance for the respective groups of line circuits.

Current supply system for terminal devices

A telephone switching system of the stored program control type comprising a calling line identifier for identifying the position of a calling subscriber on the switching network and a called line busy status detector for detecting the free or busy status of a called line designated by a central controller. The central controller reads and utilizes the information identified and detected by the above-mentioned two devices respectively, thereby to eliminate the need for memories in the central controller to store the status of all subscribers' lines.

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Yokohama, Japan

Hirotoshi Shirasu