Seiko Instruments Inc

Hirotomo Oniwa

Shuhei Yamamoto

Masafumi Hoshino

Hiroyuki Fujita

Fujio Matsu

Shigeru Senbonmatsu

Teruo Ebihara

Kentaro Yagi

A display device includes a liquid crystal panel, a controller, a common driver and a segment driver. The common driver is powered by a high power supply voltage and outputs row driving waveforms having predetermined voltage levels, which are relatively high. The segment driver is powered by a low power supply voltage and outputs column driving waveforms having predetermined voltage levels, which are relatively low. By this construction, it is not necessary for both the segment and common drivers to be high withstand voltage integrated circuit devices.

Display device

A display device includes a vertical driver for applying to row electrodes a set of row signals represented by a set of orthogonal functions supplied by an orthogonal function generator at each selection period by group-sequential scanning within one frame. A dot product processor successively carries out a dot product computation between the set of orthogonal functions and a set of pixel data. A horizontal driver applies to column electrodes column signals having voltage levels determined by the results of the dot product computation at each selection period in synchronization with the group-sequential scanning. A frame memory stores the pixel data for each frame in divided bit form. The dot product processor reads out the set of stored pixel data in divided bit form and executes the dot product computation to produce a column signal component for each respective bit. The horizontal driver arranges a plurality of column signal components corresponding to the respective bits subjected to either pulse modulation or frame-rate modulation within one frame period to produce the column signal that is applied to the column electrodes. A memory controller controls the writing of the pixel data into the frame memory. Bit data subjected to the pulse modulation are written to the frame memory for every frame, while bit data subjected to frame-rate modulation are selectively written to the frame memory only at frames specified by the frame-rate modulation.

Gradative driving apparatus of liquid crystal display panel

The liquid crystal display device is comprised of a matrix panel 1, a common driver 2 and a segment driver 3. A liquid crystal layer is interposed between rows of the scanning electrodes 4 and columns of signal electrodes 5. A frame memory 6 stores an inputted dot data each frame. An orthonormal signal generator 7 generates a set of orthonormal signals to sequentially feed the same in a desired combination pattern to the common driver 2 to concurrently drive a multiple of the scanning electrodes 4 to effect group sequential scanning according to the combination pattern. A dot product computation unit 8 executes dot product computation between a set of the dot data and the set of the orthonormal signals, the result of which is fed to the segment driver 3 to drive the columns of the signal electrodes 5. The group sequential scanning is repeated several times within one cycle to display a picture. The orthonormal signals are horizontally or vertically shifted to improve the quality of the displayed picture. Further, the multiple concurrent line number is optimized to balance the withstand voltage between the common driver 2 and the segment driver 3. Moreover, in the gray shading display by pulse-height modulation, a voltage pulse assigned to a virtual line of the scanning electrode is spread out to improve the gray shaded quality of the displayed picture.

Liquid crystal display device

In order to prevent signal distortion using a multiple line selection driving technique when using pulse width modulation to achieve a half-tone display in a liquid crystal display panel, respective bits of column signals are arranged in a descending pulse width order and a voltage generating circuit is used to lower level differences in adjacent bits. An orthonormal function generating circuit generates a plurality of row signals to drive a group of row electrodes through a vertical driver. A dot product computation circuit computes a dot product of the orthonormal functions and pixel display data to generate a column signal in the above manner. A horizontal driver applies the column signal to a group of column electrodes. Pixel data is stored in a frame memory, each datum being represented by a series of bits corresponding to a gray scale. The dot product computation circuit divides the pixel data into the respective bits, and individually carries out the dot product computation for each bit. The horizontal driver arranges the column signal components in order of descending pulse width. A voltage level circuit lowers the voltage level between the column components to reduce distortion caused by the high switching speed between the components and the low response time of the liquid crystal material.

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Hirotomo Oniwa