Hitachi, Ltd.

Hitachi Video Engineering, Incorporated

Hitachi Denshi Kabushiki Kaisha

Hiroto Yamauchi

Shoji Ohno

Motoyoshi Sasaki

Hisashi Ohta

Yoshiyuki Azuma

Katsuhiko Abe

Mayumi Ueyama

Nobukazu Doi

Seiichi Mita

Morishi Izumita

Mamoru Kaneko

Tetsuya Amano

Hitoaki Owashi

Koichi A Ono

Tomishige Yatsugi

Masuo Umemoto

Katsuyuki Watanabe

Akira Saito

Nobuo Murata

Hideki Imai

Kenji Ichige

Susumu Kasai

Kooji Minabe

Shigeaki Fujino

A magnetic recording/reproducing apparatus having a capability of allowing contents of records on a magnetic tape to be discriminatively identified and a capability for displaying closed caption includes a tape map memory for storing contents recorded on a tape and a tape map controller. As a manual input facility, a tape map button, a caption button, a play-back button, a stop button and others are provided. Upon loading of a tape undergone recording(s), the tape map button is pushed to display on a monitor screen tape map information concerning the contents of program(s) recorded on the loaded tape, temporal duration(s) of the program(s), and history of play-back of the tape.

Magnetic recording/reproducing apparatus for searching programs recorded on magnetic tape

Magnetic recording/reproducing apparatus for search programs recorded on

magnetic recording/reproducing apparatus for searching programs recorded

A color picture signal processing circuit, a filter circuit and a luminance/carrier chrominance signal separation circuit implemented by employing the filter circuit. The circuit processing signal includes an adaptive-type (C) comb line filter through which the luminance signal is caused to pass. The output of the filter undergoes amplitude limitation in a limiter circuit, the output of which is subtracted from the original luminance signal. The carrier chrominance signal is added to the luminance signal to obtain a composite picture signal. The filter circuit is comprised of a pulse pattern suppressing circuit including a decision circuit for deciding which of positive and negative patterns the three adjacent data form constitute, a positive pulse pattern suppressing circuit, a negative pulse pattern suppressing circuit and a circuit selecting for either one of the output signal of the positive and negative pulse pattern suppressing circuits in accordance with the result of decision made by the decision circuit.

Luminance/chrominance signal separation circuit having filter circuit

A magnetic recording/reproducing circuit system which comprises an amplitude control circuit and wherein a video recording signal and voice recording signal are supplied to a magnetic head to be written as superimposed on surface and deep layers of a magnetic recording medium in a record mode and to be reproduced from the recording medium in a reproduction mode. In the record mode, the amplitude control circuit detects an ambient temperature and controls a current value indicative of the video recording signal to be optimum for the detected temperature. As a result, in the reproduction mode, a reproduction video signal can be substantially stabilized regardless of a variation in the ambient temperature.

Magnetic recording/reproducing circuit system including a temperature

A waveform equalization method whereby a transversal filter having 5 or more tapes is included, and a difference signal output, which is obtained when an isolated impulse response waveform of a digital modulated signal is inputted to the above described filter and the output of the filter is inputted to an adder, is allowed to have intersymbol interference at .+-.T/2 with respect to the central axis time and has zero outputs at .+-.nT/2 (where n.gtoreq.2 and n is an integer).

Method and apparatus for waveform equalization

A demodulation circuit for demodulating a modulated digital including a unit for detecting a specific pattern contained in a series of data before modulation, a unit for judging the phase relation between the specific pattern and a clock pulse used for demodulation, a unit for performing a counting operation on the basis of the result of said judgment, and a unit for controlling the phase of said clock pulse for demodulation on the basis of the count.

Demodulation circuit for digital modulated signal

A device for decoding coded digital signals for every symbol consisting of a plurality of binary signals comprises first circuit for generating a first reliability for every binary signal; hard decided from the received or reproduced signal, in the symbol and second circuit for generating a second reliability for every symbol consisting of n binary signals on the basis of the first reliability, whereby decoding processing e.g. soft decision decoding is effected for every signal, depending on the second reliability.

Decoding device for digital signals

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Hitachinaka, Japan

Hiroto Yamauchi