Nec Lcd Technologies, Ltd.

Nec Corporation

Japan Science and Technology Corporation

Hirotaka Yamaguchi

Hiroaki Tanaka

Michiaki Sakamoto

Hiroshi Kanou

Takasuke Hayase

Satoshi Ihida

Wakahiko Kaneko

Tae Yoshikawa

Seiji Suzuki

Masayoshi Suzuki

Teruaki Suzuki

Takahiko Watanabe

Satoshi Mori

Yoshihiko Hirai

Toshiya Ishii

Shinichi Nakata

Hiroaki Matsuyama

Hiromi Nakanishi

Syuusaku Kido

Tae Miyahara

Hiroyuki Oki

To provide a liquid crystal display apparatus exhibiting optimum display performance despite reduction in the number of PR(photolithography) processes, and a method for producing the apparatus. A method for producing a liquid crystal display apparatus having a first substrate including a thin film transistor and a reflector on an insulating substrate. An etching mask is formed on a metal layer formed on the insulating substrate and, using this etching mask, the metal layer is etched to form a constituent portion of the thin film transistor and protrusions. Only the etching mask is caused to reflow to cover exposed surface portions of the constituent portion of the thin film transistor and protrusions and near-by surface portions of the insulating substrate with the etching mask as the insulating substrate is partially exposed. Using the etching mask, recesses are formed in an exposed area of the insulating substrate. A reflector is formed on the protrusions and recesses.

Method for producing liquid crystal display apparatus

An active matrix substrate of a channel protection type having a gate electrode, a drain electrode and a pixel electrode is isolated in each layer by insulating films. The active matrix substrate is to be prepared by four masks. A gate electrode layer, a gate insulating film and an a-Si layer are processed to the same shape on a transparent insulating substrate to form a gate electrode layer and a TFF area. A drain electrode layer is formed by a first passivation film with the first passivation film formed as an upper layer. In a second passivation film, formed above the first passivation film, are bored a first opening through the first and second passivation films and a second opening through the second passivation film. A wiring connection layer is formed by ITO provided as an uppermost layer. A storage capacitance unit, including the first and second passivation films sandwiched between the gate electrode and an electrode layer formed as a co-layer with respect to the gate electrode, is connected to the pixel electrode.

Active matrix substrate and manufacturing method therefor

A method for achieving the sufficient expression of a gene in a useful higher plant which has been transformed by transferring the above gene encoding a protein having a function carried by another organism so as to impart the function to the plant. Namely, a method for transforming a useful plant by transferring a gene of another species into the plant characterized in that the region of a factor relating to the poly(A) addition of the mRNA of the useful plant to be transformed contained in the base sequence of the gene of the other species is denatured into another base sequence not relating to the poly(A) addition of the mRNA without substantially altering the function of the protein encoded by the gene to be transferred; and a gene usable in the gene transfer.

Method for transforming plant, the resultant plant and gene thereof

A method for fabricating an active matrix LCD panel for use in an active matrix LCD device includes the step of forming a passivation layer acting as a channel protection layer for protecting an amorphous silicon active layer, thereby reducing the number of photolithographic steps. A transparent conductive film is used for forming a gate electrode and a pixel electrode before formation of an amorphous silicon film for the TFTs.

Active matrix LCD panel

An active matrix substrate of a channel protection type having a gate electrode, a drain electrode and a pixel electrode isolated from one another from layer to layer by insulating films. The active matrix substrate is to be prepared by four masks. A gate electrode layer, a gate insulating film and an a-Si layer are processed to the same shape on a transparent insulating substrate to form a gate electrode layer ( of FIG. ) and a TFF area. A drain electrode layer ( of FIG. ) is formed by a first passivation film ( of FIG. ) via a first passivation film ( of FIG. ) formed as an upper layer. In a second passivation film ( of FIG. ) formed above it are bored an opening through the first and second passivation films and an opening through the second passivation film. A wiring connection layer is formed by ITO ( of FIG. ) provided as an uppermost layer. A storage capacitance unit, comprised of the first and second passivation films sandwiched between the gate electrode and an electrode layer formed as a co-layer with respect to the gate electrode, is provided in the pixel electrode.

A liquid crystal display apparatus includes a first substrate, a second substrate and a liquid crystal layer interposed between the first substrate and the second substrate. The first substrate includes on a surface facing the second substrate, a plurality of gate bus lines extending into a row direction, a plurality of drain bus lines extending into a column direction, and a plurality of pixels arranged in matrix. Each of the plurality of pixels includes a portion of one of the plurality of gate bus lines associated with the pixel, a portion of one of the plurality of drain bus lines associated with the pixel, a portion of a capacitance line associated with the pixel, a pixel transistor having a source and a drain which is connected with the associated drain bus line, a control electrode connected with the source and formed in at least a portion of a region of the pixel, and a the pixel electrode which is in an electrically floating state and which is formed to cover the control electrode and a portion of the capacitance line through at least one of a first insulating film and second insulating film.

Liquid crystal display apparatus and manufacturing method for the same

A gate-insulating layer, intrinsic amorphous-silicon semiconductor layer, and ohmic contact layer are continuously formed so as to cover a gate electrode on a substrate to remove a natural oxide film from the surface of the ohmic contact layer by performing radio-frequency sputter etching before forming source and drain electrodes. After the natural oxide film is removed, a metallic layer mainly containing Al is formed on the gate-insulating layer and ohmic contact layer.

Thin-film transistor and fabrication method thereof

Growing community of inventors

Tokyo, Japan

Hirotaka Yamaguchi