Yamaha Corporation

Fdk Corporation

Other

Hirotaka Kawai

Nobuaki H Tsuji

Hiromitsu Umezawa

Yasuomi Tanaka

Hidenori Nakada

Isao Kojima

Teruhisa Sahashi

Morito Morishima

Tsugio Tokumasu

Toshiyasu Suzuki

Hiroaki Ono

Nobuhiro Fukushima

Yuko Ota

Tatsuya Kishii

Taro Nakamura

Masato Miyazaki

Masayoshi Nakamura

Masaya Suzuki

Yohei Otani

Hidenori Nakata

Ken Makino

Mitsuru Nagasawa

Youichi Suzuki

Shinzo Fujii

An input/output port, a birefringent element, variable polarization rotator, and a reflector are arranged along an optical axis in the order named. The variable polarization rotator includes permanent magnets for applying a fixed magnetic field to a Faraday rotator in an in-plane direction to magnetically saturate the Faraday rotator and a solenoid coil for applying a variable magnetic field to the Faraday rotator in a direction of the optical axis. A fixed magnetic field is applied in the &#x3c;211&#x3e; direction, in which the Faraday rotator is likely to be magnetically saturated. The Faraday rotator can be saturated with a low magnetic field of about 100 Oe. The permanent magnets may employ ferrite permanent magnets, which have weak magnetic forces. A variable magnetic field may also be reduced. Therefore, an air-core coil can be used.

Reflection type variable optical attenuator

A charge pump includes a switching circuit which is interposed among first and second output capacitors, a flying capacitor, and an input power supply; and a control unit which controls the switching circuit. The charge pump is operated in an operation mode including a high-voltage outputting mode, a low-voltage outputting mode, and a relay mode. The control unit controls the switching circuit so that respective charging voltages of the first and second capacitors that are charged in the high-voltage outputting mode are gradually lowered. The control unit changes the operation mode of the charge pump by relay transition from the high-voltage outputting mode through the relay mode to the low-voltage outputting mode when a voltage lower command is given during a period when the operation mode of the charge pump is in the high-voltage outputting mode.

Charge pump

A successive approximation A/D converter, includes a reference voltage generation circuit, a sample/hold circuit, a D/A converter circuit, a comparator, and a control circuit. A potential difference between the comparison target voltage generated by the D/A converter circuit and the internal analog voltage is applied to one input terminal of the comparator through a first signal line, and the reference voltage generation circuit is connected to the other input terminal of the comparator through a second signal line and a switch. Capacitive elements are disposed between the high potential power supply and the second signal line, and between the second signal line and the low potential power supply, respectively. The control circuit turns ON the switch to charge the first and second capacitive elements during a period when the sample/hold circuit samples and holds the internal analog voltage and turns OFF the switch in response to end of the period.

Successive approximation A/D converter

A controllerupdates data LVLm indicative of a level section of an input audio signal and controls a reference level Vr based on a signal CMP representative of a comparison result between the input audio signal and the reference level Vr, and further, controls gains of electronic volumesL andR in such a manner that these gains become such gains corresponding to the level section of the input audio signal. In this case, the level sections of the input audio signals are related to the gains in such a manner that levels of output signals of the electronic volumes do not exceed a previously set output amplitude upper limit level.

Automatic gain control circuit

A pulse monitor circuit detects the presence or non-presence of the output pulses output from an output stage circuit. The pulse monitor circuit outputs an up signal to the up/down counter when the output pulses do not exist at all and outputs a down signal to the up/down counter when the output pulses exist. The up/down counter outputs a signal for increasing the delay amount of a delay amount variable circuit when a count value is large, that is, when the output pulses disappear. In contrast, when the count value is small, that is, when the output pulses exist, the counter outputs the signal for reducing the delay amount of the delay amount variable circuit.

Class D amplifier circuit

An N-channel transistor is provided as a switch between a high potential power line and a low potential power line. A high-pass filter is constituted by a capacitor and a resistor. When a voltage between the high potential power line and the low potential power line is started to oscillate by a switching operation, the high-pass filter causes a high-pass component thereof to pass, thereby turning ON the N-channel transistor to reduce a ringing.

Semiconductor integrated circuit for realizing an amplifier having ringing reduction circuitry

A class D amplifier circuit includes a signal generation section that generates a first pulse width modulation signal and a second pulse width modulation signal based on an input signal. When a level of the input signal is zero, the signal generation section generates: the first pulse width modulation signal having a repeated first wide-width pulse signal portion, which has a wide width and a repeated first narrow-width pulse signal portion, which has a narrow width which is narrower than the wide width of the first wide-width pulse signal; and the second pulse width modulation signal having a repeated second narrow-width pulse signal portion, which has a narrow width and a repeated second wide-width pulse signal portion, which has a wide width which is wider than the narrow width of the second narrow-width pulse signal portion. A rising point in time of the second narrow-width pulse signal portion occurs after a rising point in time of the first wide-width pulse signal portion and a falling point in time of the second narrow-width pulse signal portion occurs before a falling point in time of the first wide-width pulse signal portion. A rising point in time of the first narrow-width pulse signal portion occurs after a rising point in time of the second wide-width pulse signal portion and a falling point in time of the first narrow-width pulse signal portion occurs before a falling point in time of the second wide-width pulse signal portion.

A class D amplifier includes an input unit that inputs an input signal and an integrator which includes a differential operational amplifier having an offset voltage correction function. The integrator integrates the input signal input. A pulse-width modulator modulates the integration result of the integrator to generate a pulse signal having a pulse width reflective of the integration result. An output unit outputs the pulse signal. A feedback unit superimposes a signal output from the output unit on the input signal and feeds back the superimposed signal to the integrator. An input controller selectively set the input unit to a state where no signal is input. An output controller sets a voltage of an output from the feedback unit to a constant voltage.

Offset voltage correction circuit and class D amplifier

The present invention provides a D/A converter circuit which enables D/A conversion with a high precision and can prevent occurrence of a limit cycle component in the case where an input signal is low, and can also prevent the effect of dither signal from occurring in an analog signal which is a D/A conversion result. A dither signal generation sectionoutputs a dither signal (DITHER) which is an alternating current signal and a reversal dither signal (DITHER_N) inverted from the dither signal. A DEM decoderprocesses an input digital signal including a component of the dither signal (DITHER), and outputs a plurality of lines of time-series digital signals having a density of '1' or '0' conforming to the input digital signal to be processed. An analog addition sectionconverts a plurality of lines of time-series digital signals and the reversal dither signal (DITHER_N) into an analog signal respectively and adds them, and outputs an analog signal which is a D/A conversion result.

D/A converter circuit and digital input class-D amplifier

A spectrum spreading circuit, includes a control portion that repeats a sequence in which the control portion generates a designation signal for designating all of plural frequencies in prescribed order by selecting a next frequency from the frequencies which have not been selected, and a signal generating portion that sequentially generates output signals having the designated frequencies respectively on the basis of the designation signal.

Spectrum spreading circuit

A comparator has P-channel field effect transistors that are supplied at respective gates with input voltages Vin and Vref, which are objects of comparison, and that act as a differential transistor pair; and N-channel field effect transistors that serve as current channels for respective drain currents of these two P-channel field effect transistors and that act as a current mirror circuit. The comparator outputs a drain voltage Vx of an N-channel field effect transistor as a signal showing a result of comparison between the two input voltages. An N-channel field effect transistor diode-connected to the comparator is interposed between drains of the N-channel field effect transistors.

Comparator

An offset voltage correction circuit for a differential amplifier comprising NMOS transistors serving as a pair of differential transistors, and PMOS transistors serving as a pair of load transistors connected between outputs of the pair of differential transistors and a power source. The offset voltage correction circuit is equipped with a voltage generator for generating, between a source of any one of the pair of load transistors and the power source, a constant voltage for correcting an offset voltage of the differential amplifier.

A digital input class-D amplifier includes a decoder which outputs a plurality of lines of time-series digital signals having a density of 1 or 0 conforming to an input digital signal, an error integrator which integrates a difference between a drive waveform to be applied to a load and a sum of the plurality of lines of time-series digital signals output from the decoder, and a modulation circuit which generates a pulse modulated with a pulse width or a pulse density based on a result of integration performed by the error integrator. The load is driven in accordance with the pulse generated by the modulation circuit.

Digital input class-D amplifier

An optical attenuator with increased dynamic range and reduced temperature-dependence over the dynamic range. The optical attenuator has a Faraday rotational angle variable device which applies an external magnetic field to light polarized by a garnet crystal, and a polarizer and an analyzer disposed at the front and rear of the optical axis of the device. There is an angle x formed between the plane of polarization of the light incident to the garnet crystal and the magnetic field orthogonal to the optical axis, where an angle y is formed between the polarizer and the analyzer, and the angle x is set to satisfy {(&#x2212;z/2)+90&#xd7;n}&#x2212;12&#x3c;x&#x3c;{(&#x2212;z/2)+90&#xd7;n}+12 (n=0, 1, 2 or 3), where z=y&#xb1;90; z is the angle of rotation of the plane of polarization caused by the Faraday rotational angle variable device.

Optical attenuator

Optical devices including a Faraday rotation devices improved in wavelength and temperature characteristics and an optical attenuator reduced in wavelength dependence and temperature-dependent loss. The Faraday rotation device has permanent magnets magnetized in an axial direction of through-holes, and Faraday elements having a same Faraday rotation direction with respect to a same magnetization direction. The permanent magnets are directed in the same magnetization direction along an optical path, where part of the Faraday elements are accommodated in the through-hole of the permanent magnet, and the remaining Faraday elements are arranged between the magnets, whereby the Faraday elements are to be applied by magnetic fields in opposite directions. For a device variable in Faraday rotation angle, an electromagnet is provided. An input fiber collimator and polarizer are provided on an input side of with the Faraday elements while an analyzer and output fiber collimator are on an output side.

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Hamamatsu, Japan

Hirotaka Kawai