Kabushiki Kaisha Toshiba

Hirotaka Amakawa

Nobutoshi Aoki

Takahisa Kanemura

Mitsutoshi Nakamura

Naoki Kusunoki

Sanae Ito

Sanae Fukuda

A semiconductor device includes a silicon substrate having a film thickness smaller than a maximum range of a particle generated by a nuclear reaction between a fast neutron and a silicon atom, and a semiconductor element formed on a surface of the silicon substrate.

Semiconductor device

An aspect of the present invention provides a method of carrying out a simulation with simulation data, including, determining whether or not the simulation data includes boundary conditions set for a boundary of a calculation area set for the simulation, computing the influence of the boundary conditions on the inside of the calculation area if the simulation data includes the boundary conditions, displaying the influence of the boundary conditions on the inside of the calculation area, prompting to enter an instruction whether or not the boundary conditions are changed, and if an instruction to make no change in the boundary conditions is entered, carrying out the simulation with the simulation data.

Simulation method, simulation program, and semiconductor device manufacturing method each employing boundary conditions

An ion implantation simulator that computes an ion density distribution at high speed and with high accuracy based on a beam dispersion phenomenon in an ion implantation process. The ion implantation simulator is provided with the beam dispersion approximate function storage section, which stores a beam dispersion approximate function that is obtained through approximation of ion beam dispersion by using a predetermined function; a beam intensity computing section, which computes an area surface beam intensity that indicates an intensity of the ion beam on a surface of an implanted area by using the beam dispersion approximate function; and an ion density distribution computing section, which computes the density distribution of the ion, which is implanted by the ion beam into the device through the surface of the implanted area, by using the area surface beam intensity.

Apparatus, method and program for ion implantation simulation, and computer readable storage medium having stored therein the program

Plural boundary points are generated on a string on the surface of a material and a first length of a line segment between the boundary points is obtained. Then, the displacement of the boundary point according to a process model and the boundary point is moved by the displacement. A second length of the line segment between the boundary points after the boundary point is moved is found. When the second length is greater than a value obtained by multiplying the first length by a first factor exceeding 1, a new boundary point is added to the line segment whereas when the second length is smaller than a value obtained by multiplying the first length by a second factor less than 1, one of the boundary points of the line segment is eliminated.

Method of simulation of production process of semiconductor device and simulator thereof

Process simulation for LSIs and other semiconductor devices will handle plural same impurities introduced in different processes as different impurities. Thus, by handling them as different impurities in calculation, it is possible to obtain the distribution profiles of impurities in semiconductor devices without being effected by another same impurity introduced in another process or a number of processes during processing. With this, even a plurality of process conditions are discussed or when one or some of process(es) in a sequence of semiconductor device fabrication processes is (are) changed in procedure, it is not necessary to repeat the process simulation many times from the beginning. And it is possible to easily decide which process must be changed in conditions based on a finally obtained structure of semiconductor devices. The process simulation results are used directly as input to device simulation, to rapidly obtain performance of semiconductor devices such as current vs voltage characteristics. Therefore, the efficiency of calculations required to obtain the optimal conditions for semiconductor structures can be improved, thus shortening the lapse of time for designing and development of semiconductor devices.

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Kanagawa-ken, Japan

Hirotaka Amakawa