Hitachi, Ltd.

Renesas Technology Corp.

Hiroshige Kogayu

Naoki Yamamoto

Yoshikazu Tanabe

Kazutaka Mori

Mitsugu Kusunoki

Takehiko Yoshida

Ryusuke Sahara

Yoshitaka Tadaki

Tamotsu Miyake

Koji Ishikawa

Formation of an WNfilmconstituting a barrier layer of a gate electrodeA having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WNfilmis suppressed in the heat treatment step after the formation of the gate electrodeA.

Semiconductor integrated circuit device and process for manufacturing the same

A semiconductor apparatus includes a first transistor having a first emitter electrode, a first base electrode, and a first collector electrode in a region over a first region. Base lead-out polysilicon connecting the first base electrode and a first base region passes over a second region provided out of the first region and a resistor element is added. A writing voltage is reduced in an antifuse using two bipolar transistors.

Semiconductor apparatus

A DAC having a memory mat including a plurality of first memory cells, and a plurality of output lines connected to the plurality of first memory cells. Each of the plurality of memory cells has a first memory portion including bipolar transistors and storing information in non-volatility based on whether a junction of the bipolar transistors is destroyed or not, and a second memory portion connected to the first memory portion and for outputting information to corresponding one of the plurality of output lines. The DAC has a first mode in which information is transferred from the first memory portions to the second memory portions when the information is written into the second memory portions, and a second mode in which the second memory portions are specified externally and information is written into the second memory portions. Thus, the performance of a D/A converter can be improved.

Semiconductor device having D/A conversion portion

A DAC having a memory mat including a plurality of first memory cells, and a plurality of output lines connected to the plurality of first memory cells. Each of the plurality of memory cells has a first memory portion including bipolar transistors and storing information in non-volatility based on whether a junction of the bipolar transistors is destroyed or not, and a second memory portion connected to the first memory portion and for outputting information to corresponding one of the plurality of output lines. The DAC has a first mode in which information is transferred from the first memory portions to the second memory portions when the information is written into the second memory portions, and a second mode in which the second memory portions are specified externally and information is written into the second memory portions.

Semiconductor device having memory cells implemented with bipolar-transistor-antifuses operating in a first and second mode

In a dual polymetal gate electrode, the contact resistance at the interface of silicon films increases due to mutual-diffusion of impurities of p-type and n-type silicon films through a refractory metal and metal nitride deposited thereon. A way of inhibiting the phenomenon is carbon implantation into a refractory metal and refractory metal nitride on the boundary of p-type silicon and n-type silicon, cutting the path, or isolating it by an insulator. Thereby, mutual-diffusion of impurities through a refractory metallic film and nitride film of refractory metal is inhibited, resulting in an increase in the contact resistance of metal nitride film and silicon film and a decrease in the deviation of threshold voltage of the MISFET.

Growing community of inventors

Fussa, Japan

Hiroshige Kogayu