Matsushita Electric Industrial Co., Ltd.

Mitsubishi Denki Kabushiki Kaisha

Panasonic Corporation

Matsushita Electronics Corporation

Applied Materials, Inc.

Joled Inc.

Hiroshi Yuasa

Tetsuo Satake

Satoshi Ueda

Masazumi Matsuura

Kinya Goto

Yasutoshi Okuno

Young Seen Lee

Hiroshi Sakurai

Takeshi Yamashita

Hemant P Mungekar

Manoj Vellaikal

Susumu Matsumoto

Michinari Yamanaka

Etsuyoshi Kobori

Hirotsugu Honda

Toru Yamaoka

Zenken Kin

A light-emitting element includes: a first electrode; a light-emitting functional layer that is provided on the first electrode, and includes a conductive layer as an uppermost layer thereof; a second electrode that is provided on the conductive layer, and has an undesired opening that corresponds to a region of the conductive layer; and a first passivation layer that is provided on the second electrode except on a periphery of the opening. The region of the conductive layer is oxidized. The light-emitting functional layer includes an organic light-emitting layer, and the conductive layer is provided above the organic light-emitting layer.

Light-emitting element and light-emitting element manufacturing method

An organic EL device includes a first substrate and a plurality of organic EL elements above a first portion of the first substrate. A first inorganic layer covers the plurality of organic EL elements. An active layer is above a second portion of the first substrate that is different than the first portion. The active layer comprises a material that is at least one of hygroscopic and oxidizable. A second inorganic layer covers the active layer. A second substrate is opposite the first substrate, with the plurality of organic EL elements being between the first and second substrates. A seal extends between the first and second substrates to define a sealed space between the first and second substrates. The second inorganic layer includes through-holes that expose the active layer to the sealed space that is defined by the first substrate, the second substrate, and the seal.

Organic light-emitting device and method of manufacturing the same

An organic electroluminescence (EL) display panel and method of manufacturing an organic EL display panel. The display panel includes a substrate on which a thin-film transistor layer is formed, with an interlayer insulating film formed above the thin-film transistor layer. A plurality of strip-shaped barrier ribs are arranged in parallel on the interlayer insulating film. Each electrode of a plurality of first electrode groups has first electrodes arranged in a line and arranged between two adjacent barrier ribs of the plurality of strip-shaped barrier ribs, with each of the first electrodes including a transparent conductive film and a reflective metal film formed of a metal material. A plurality of light-emitting layers are each formed to cover a different electrode of the plurality of first electrode groups, while a second electrode is formed above the plurality of light-emitting layers. Each electrode of the plurality of first electrode groups is formed such that an end portion of the first electrode in a parallel direction with respect to the barrier ribs includes a single-film portion in which the transparent conductive film is not formed, and a portion of the first electrode other than the single-film portion includes a two-film portion in which the transparent conductive film is layered on the reflective metal film. A metal oxide film is formed on an entire surface of the single-film portion of each first electrode by partially oxidizing the metal material.

Organic EL display panel and method of manufacturing the same

Methods deposit a film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. Flows of first precursor deposition gases are provided to the substrate processing chamber. A first high-density plasma is formed from the flows of first deposition gases to deposit a first portion of the film over the substrate and within the gap with a first deposition process that has simultaneous deposition and sputtering components until after the gap has closed. A sufficient part of the first portion of the film is etched back to reopen the gap. Flows of second precursor deposition gases are provided to the substrate processing chamber. A second high-density plasma is formed from the flows of second precursor deposition gases to deposit a second portion of the film over the substrate and within the reopened gap with a second deposition process that has simultaneous deposition and sputtering components.

Gapfill using deposition-etch sequence

A hole is formed in an insulating film containing silicon and carbon. The insulating film has a density or a carbon concentration varying gradually in the direction of the thickness thereof.

Method for fabricating a dual damascene contact in an insulating film having density gradually varying in the thickness direction

A wiring groove is formed in an insulating film, and then a reformed layer is formed in the vicinity of the wiring groove in the insulating film. Thereafter, a conductive film is buried in the wiring groove, thereby forming a wire. Subsequently, the reformed layer is removed to form a slit, and then a low-dielectric-constant film having a relative dielectric constant lower than the insulating film is buried in the slit.

Electric device and method for fabricating the same

An insulating film is formed of a carbon-containing silicon dioxide film on a semiconductor substrate. In the insulating film, an interconnect groove is formed. A silicon dioxide layer with a density high enough to allow almost no oxygen to pass therethrough is formed on the bottom and side faces of the interconnect groove. And a metal interconnect is formed on the silicon dioxide layer inside the interconnect groove.

Method for forming metal interconnect in a carbon containing silicon oxide film

After a hole is formed in a low dielectric constant film on a substrate, a protective film is formed on the wall surface of the hole or an electron acceptor is caused to be adsorbed by or implanted in the low dielectric constant film exposed at the wall surface of the hole. Otherwise, resist residue is left on the wall surface of the hole. Then, a resist pattern having an opening corresponding to a wire formation region including a region formed with the hole is formed by using a chemically amplified resist.

Method for fabricating electronic device

Electronic device includes an insulating film having density or carbon concentration varying gradually in the direction of the thickness and a conductive film formed therein

Method for fabricating metal interconnect in a carbon-containing silicon oxide film

A plurality of lower-level metal interconnects are formed over a semiconductor substrate. A first fluorine-containing insulating film, made of a fluorine-doped insulator, is formed to fill in gaps between adjacent ones of the lower-level metal interconnects over the semiconductor substrate. An interlevel insulating film is formed over the lower-level metal interconnects and the first fluorine-containing insulating film. And a plurality of upper-level metal interconnects are formed on the interlevel insulating film. The interlevel insulating film includes: a second fluorine-containing insulating film made of a fluorine-doped insulator; and a silicon-rich insulating film containing a larger quantity of silicon than a quantity defined by stoichiometry.

Semiconductor device and method for fabricating the same

Method of fabricating interconnects utilizing fluorine doped insulators and barrier layers

The present invention relates to the method of manufacturing an antifuse element having an antifuse layer formed between interconnection layers. Conventionally, an antifuse layer was formed after an aperture was formed through an interlayer insulating film. Such resulted in a thinner film thickness at the corner formed by inner wall surface of the aperture and a lower electrode layer. As it is very difficult to control the film thickness of the thinnest part to a specific value, control of the insulation breakdown voltage in 'off' state was difficult. The present antifuse element includes a layer with a flat shape of an even thickness. The layer is a complexed film of amorphous silicon film, silicon nitride film and silicon oxide film. The antifuse electrode layer is of a titanium nitride, the film thickness of which is thicker than the invasion length of a fuse link into electrode layers. The step coverage of upper electrode layer is set to be higher than 80%, by controlling the film thickness of the insulation film separating the electrodes and the tapered shape of the aperture in the antifuse region.

Growing community of inventors

Kyoto, Japan

Hiroshi Yuasa