Power Spin Inc.

Hiroshi Yoshida

Tetsuo Endoh

Etsuo Fukuda

Toshimasa Namekawa

Satoru Araki

A semiconductor memory device includes a memory cell array including a plurality of memory cells each including a resistance change type memory element configured to store a resistance state and a switch, a read determination circuit that compares a measurement signal from the memory cell selected in the memory cell array with a reference signal to determine a resistance state so as to read information from the resistance change type memory element, and a reference signal correction unit that corrects a level of the reference signal based on a selected position of the memory cell in the memory cell array.

Growing community of inventors

Miyagi, Japan

Hiroshi Yoshida