Other

Kabushiki Kaisha Toshiba

Nissan Motor Company Limited

Zentel Japan Corporation

Chemical Art Technology, Inc.

Laurus Corporation

Watanabe, Hiroshi

Hiroshi Watanabe

Riichiro Shirota

Te-Chang Tseng

Yukihiro Nagai

Takeshi Hamamoto

Toshitake Yaegashi

Atsuhiro Kinoshita

Masao Sakata

Satoru Hirose

Kunio Fukatsu

Ikuo Kurachi

Shigeru Kinoshita

Shigeyuki Takagi

Sadao Sekine

Hideaki Baba

Nobuyuki Sano

Zhe-An Lee

Chih-Wei Yao

Yasuo Tsukada

There is a significant precaution when performing random dopant fluctuation by using the drift-diffusion model that is the basis of the conventional device simulation. Because the continuation by a long wavelength approximation was done to derive said drift-diffusion model. That is how to recover the location dependence of discrete impurity ions in the long wavelength approximation. For example, in the case that there is an impurity ion near to the interface to an insulating film, the charge density of an impurity ion, which was made continuous in the conventional method, is unable to catch the charge density change due to polarization at the interface. Because this polarization is dependent of the location of a discrete impurity ion near to the interface. A method for simply implementing the effect of polarization to the device simulation is provided by appending an image charge inside the insulating film to linearize the charge of discrete impurity ion which locates near to the interface to satisfy the consistency to the drift-diffusion model while keeping the location dependency of the discrete ion.

Simulation method of an electron device

A semiconductor biosensor includes a central reaction unit of an inspection equipment. The central reaction unit includes a plurality of first conducting wires, a plurality of second conducting wires, a common electrode source, a plurality of sense-amplifiers, a plurality of non-volatile memory type transistors, and a first oxide film. Each sense-amplifier is connected to a respective second conducting wire. The non-volatile memory type transistors are respectively formed on the second conducting wires. Each non-volatile memory type transistor includes a control gate, a third oxide film, a floating gate, and a second oxide. The first oxide film wraps or covers the first conducting wires. Receptors are fixed on a surface of the first oxide film. A portion of the targets couples with a portion of the receptors to form composite bodies. The sense-amplifiers are configured to detect a change in a current signal based on the charges of the composite bodies.

Semiconductor biosensor and control method thereof

A network includes a logical network and a physical network. The logical network includes a plurality of logical nodes. Each logical node is connected to a respective identification core. Each identification core includes at least one semiconductor chip having a physical randomness. Each semiconductor chip generates one of a plurality of pairs of private keys and public keys based on the physical randomness thereof according to an input received by the one of the at least one semiconductor chip under a public key cryptography. One of the public keys is regarded as a logical address of one of the logical nodes, which is connected to one of the identification cores. The physical network includes a plurality of physical nodes. Each identification core is one of components in each physical node. The logical network is uniquely linked to the physical network by the pairs of private keys and public keys.

Network without abuse of a private key

A semiconductor device including a semiconductor chip having a cell array is provided. The cell array includes identification cells distributed in sub-blocks of the cell array. The identification cell has a cell address and the sub-block has a block address. The cell address is related to the block address. A portion of the block addresses include the cell address at which an identification cell exhibiting a predetermined characteristic is located. The predetermined characteristic is based on a physical randomness which is intrinsic of the semiconductor chip. The semiconductor chip further has a physical random number code including the portion of the block address. The physical random number code is secured by the semiconductor chip. This disclosure provides the technology to prevent malicious manipulation of physical addresses by artfully incorporating physical network with logical network, and to make the administration of hardware network more secure.

Apparatus and method for chip identification and preventing malicious manipulation of physical addresses by incorporating a physical network with a logical network

An authenticated network having a plurality of nodes is disclosed. Each node includes a transaction unit and an identification core. The identification core includes a key generator. The key generators of the identification cores generate a plurality of unique pairs of secret and public keys. The public key serves as a logical address of the transaction unit. Another authenticated network having a plurality of nodes is also disclosed, in which the identification core further includes a private key. The key generators of the identification cores generate a plurality of public keys from the private keys of the identification cores. Each public key serves as a logical address of the transaction unit of a corresponding node. One of the public keys and one of the private keys form a unique pair. Thus, the transaction unit manages the information communication among the plurality of nodes. The identification core manages an authentication of the nodes.

Authenticated network

An authenticated network in which a physical network including physical nodes with actual physical substances and a logical network including logical nodes without actual substances are uniquely linked to expand public ledger technology, which secures Peer-to-peer (P2P) type communication on a logical network, to a physical network, is provided. The authenticated network includes a private key uniquely linked to a public key. The private key is generated by a key generator and an identification device having physical substance and included in an identification core. The private key is regarded as a physical address of the identification core and is confined in the identification core. The public key is publicized as a logical address of a logical node. The logical node and the physical node are uniquely linked by the public key and the private key. The security of the whole network is thus effectively improved.

A method of using a chip identification device is jointly performed by a chip mass-produced by a semiconductor manufacturing process, a first chip manufacturer making the chip, and a chip user assembling a product by using the chip. The method includes inputting a first published passcode, published by the first chip manufacturer, inputting a second published passcode published by a second chip manufacturer, inputting the first published passcode to the chip by the chip user, reading an aggregate of electronic output signals as a read code, sending the read code to the first chip manufacturer to compare the first output code and the read code. The chip is regarded as a counterfeit if the comparison is consistent.

Method of using a chip identification device

A network of electronic appliances includes a plurality of network units of electronic appliances. The network units include a first network unit and a plurality of second network units. The first network unit is connected to at least one of the second network units. Each of the network units includes a stem server and a plurality of peripheral devices connected to the stem server. The stem server includes at least one passcode and at least one list of a plurality of registration codes. Each list is associated to a respective passcode. Each registration code of one list associating to one passcode corresponds to a respective peripheral device. Each registration code is generated in response to a respective passcode using physical randomness of a respective peripheral device in correspondence to the passcode. An address of each identification cell is defined by several word lines and bit lines.

Electronic appliance and network of the same

A technology precluding attacks through peripheral devices thefts to a network of electronic appliances, by utilizing physical chip identification devices, is disclosed. The electronic appliances in the network are divided into the peripheral devices and the stem servers managing the registration information of the peripheral devices. The stem servers are under the central control with software, and the peripheral devices are controlled at device-level with the physical chip identification devices implemented in the chip. Thus, the security of the whole network is efficiently enhanced.

Network unit of electronic appliances, network of electronic appliances, and method of using chip identification device

Technology prevents the peripheral devices from being taken over, to suppress the remote-attack on the network of electronic devices by applying the physical chip identification devices to the network. To realize this, a plurality of electronic appliances composing the network is divided into peripheral devices and stem servers that manage the registration information of the peripheral devices. The stem servers may be under the central control, whereas the peripheral devices hold the physical chip identification devices. By managing the peripheral devices in the level of a device like this, the security of the entire network is effectively improved.

Electronic appliance, network unit of electronic appliances, network of electronic appliances, and chip identification method

A technology precluding attacks through peripheral devices thefts to a network of electronic appliance, by utilizing physical chip identification devices, is disclosed. The electronic appliance in the network are divided into the peripheral devices and stem servers managing registration information of the peripheral devices, wherein the stem servers serve as central control using software, and the peripheral devices are managed at device-level by having physical chip identification devices, thus the security of the whole network is efficiently reinforced.

Network of electronic appliances and a semiconductor device in the network

This invention intends to enable silicon compound to be removed from waste etching solution at a high removal rate and waste etching solution to be recycled without disposing it. The etching solution reproducing apparatus includes: temperature adjusting means for adjusting the temperature of taken out waste etching solution; atomizing means for atomizing waste etching solution adjusted in temperature by the temperature adjusting means; precipitating means for collecting waste etching solution atomized by the atomizing means and precipitating silicon compound in the waste etching solution; and separating means for separating silicon compound precipitated from the waste etching solution by the precipitating means so as to obtain reproduced etching solution.

Etching solution reproducing apparatus and etching solution reproduction method

A semiconductor device designing method includes calculating capacitance. The semiconductor device has a semiconductor substrate, an insulator formed on the semiconductor substrate, and an electrode formed on the insulator. The capacitance is calculated under an approximation assuming a portion of the semiconductor substrate, the insulator and a portion of the electrode to be one of a conductor and a dielectric depending on electric characteristics thereof, respectively.

Method of designing and manufacturing semiconductor device

Light from a light source is processed on the image display element by an image signal outputted from an image control section to be projected on the screen of a predetermined curved surface shape. When the light from the light source is processed by the image signal, the image control section processes an aberration shape of a projected image so as to coincide with the shape of a projection curved surface of the screen. Thus, a desired image can be clearly projected on the screen having the curved surface shape.

Growing community of inventors

Kanagawa-ken, Japan

Hiroshi Watanabe