Kioxia Corporation

Toshiba Memory Corporation

Hiroshi Tsubouchi

Kosuke Yanagidaira

Takeshi Hioka

Kenri Nakai

Kota Nishikawa

According to one embodiment, a semiconductor memory device includes the following configuration. A second word line is provided above a first word line on a substrate. A third word line is provided above the second word line. A semiconductor layer includes a first part that passes through the first word line, a second part that passes through the second and the third word lines, and is provided above the first part, and a joint provided between the first and second parts. When a write operation is performed on a memory cell of the third word line, prior to applying a write voltage to the third word line, a first voltage is applied to a bit line, a second voltage is applied to the third word line, and a third voltage higher than the second voltage is applied to the second word line.

Semiconductor memory device

A semiconductor memory device includes a memory cell connected between a bit line and a source line, a sense amplifier having a first transistor provided between at least two transistors of the sense amplifier and the bit line, and a controller which executes a read operation to read data stored by the memory cell. In the read operation, the controller applies a first voltage to the first transistor and a second voltage to the source line during a first time period, applies a third voltage to the first transistor and a fourth voltage to the source line during a second time period after the first time period, and applies the first voltage to the first transistor and a fifth voltage to the source line during a third time period after the second time period.

According to one embodiment, a semiconductor memory device includes a memory cell, a word line, a bit line, a first transistor, a second transistor and a driver. The word line is electrically coupled to a gate of the memory cell. The bit line is electrically coupled to one end of the memory cell. The first transistor includes a first gate electrically coupled to the bit line. The second transistor is coupled to a first end of the first transistor. The driver is configured to apply a voltage to the first gate of the first transistor. In a read operation, the driver varies a voltage to be applied to the first gate of the first transistor based on a read voltage applied to the word line.

A semiconductor memory device includes a controller which executes a read operation. In the read operation, the controller applies first and second read voltages to a word line, reads data at each of first and second times, applies the first voltage to a source line at each of the first and second times, applies a second voltage to the source line during the application of the first read voltage to the word line and before the first time, and applies a third voltage to the source line during the application of the second read voltage to the word line and before the second time.

According to one embodiment, a semiconductor memory device includes a controller configured to execute a read operation. In the read operation, the controller is configured to: apply first and second read voltages to a word line, read data at each of first and second times, apply the first voltage to the source line at each of the first and second times, apply a second voltage to the source line during the application of the first read voltage to the word line and before the first time, and apply a third voltage to the source line during the application of the second read voltage to the word line and before the second time.

A semiconductor memory device includes a memory string with a first selection transistor, a first memory cell, a second memory cell, and a second selection transistor connected in series. A first word line connects to the first memory cell, and a second word line connects to the second memory cell. Selection gates line are connected to first and second selection transistors. A control circuit is configured to control a write operation on the first memory string. The write operation includes a program loop with a program operation and a program verification operation. After the program loop is completed, a first voltage is applied to the first and second word lines and a second voltage is applied to the selection gate lines. The first voltage is sufficient to turn on the first and second memory cells. The second voltage is sufficient to turn on the selection transistors.

Growing community of inventors

Yokohama Kanagawa, Japan

Hiroshi Tsubouchi