Mitsubishi Denki Kabushiki Kaisha

Ryoden Semiconductor System Engineering Corporation

Hiroshi Tobimatsu

Shigeru Harada

Hiroyuki Nishimura

Shigeyuki Yamamoto

Etsushi Adachi

Susumu Takeuchi

Shintaro Minami

Muneo Hatta

Hisoshi Adachi

Takahiro Kawasaki

Tooru Tazima

A semiconductor device allowing the manufacturing process to be simplified and fine structures therein to be readily formed and a manufacturing method thereof are provided. In the semiconductor device, a conductive layer is used as a mask during etching for forming a first opening.

Semiconductor device having conductive layer and manufacturing method

A semiconductor device having a stress-buffering film which is effective in buffering the stress caused by a molding resin during sealing, the stress-buffering film being made of a silicone ladder resin represented by formula (I) ##STR1## wherein each end group R may be the same or different and represents a hydrogen atom or an alkyl group, each side chain R' may be the same or different and represents a cyclohexyl group, a lower alkyl group, or a photopolymerizable unsaturated group, and n is an integer of 10 or larger.

Semiconductor device comprising a semiconductor substrate, an element

A method of manufacturing IC devices is applied in forming bumps on an electrode pads to be an input/output terminal of the ICs with a conductive metal layer interposed therebetween. Firstly, a first resist having a prescribed opening is formed over a semiconductor substrate having the electrode pads formed thereon. Thereafter, the metal layer is formed over the semiconductor substrate, and furthermore, a second resist is formed over it by making an opening in a region almost the same as the opening of the first resist. Then, the second resist is removed after forming the bumps within the opening of the second resist. Thereafter, the first resist is removed after removing an exposed portion of the metal layer. According to the processes, overetching of and generation of an etching residue of the metal layer are prevented.

Method of manufacturing integrated circuit devices

A WSI device comprises a semiconductor substrate having a wafer scale size. An integrated circuit having a unified function is formed on a main surface of the semiconductor substrate. The semiconductor substrate defines various cutouts centrally and/or peripherally thereof. The cutouts serve to extend peripheral regions of the semiconductor substrate. Bonding pads are formed along the extended peripheral regions of the semiconductor substrate. As a result, the number of bonding pads that can be formed is increased to promote multi-functioning of the WSI device.

Wafer scale integration device

Growing community of inventors

Hyogo, Japan

Hiroshi Tobimatsu