Fujitsu Corporation

Nippon Telegraph and Telephone Corporation

Hiroshi Takeo

Kazuo Iguchi

Shigeo Amemiya

Tomohiro Shinomiya

Koji Tezuka

Naoaki Yamanaka

Michio Kusayanagi

Akihiko Takase

Takao Ogura

Takafumi Chujo

Tetsuo Soejima

Yoichi Sato

Misao Fukuda

Toshio Shimoe

Hiroshi Nakaide

Satoshi Takeda

Shinji Ohta

Hiroshi Yamasaki

Youichi Sato

Masanori Kajiwara

Michinobu Ohhata

Takao Moriya

Shigeo Shinada

Mituhiro Takano

Kazuhiko Hohara

Tetuhiro Okabe

Kiyoshi Saitou

Ikuo Washiyama

Toshinari Kunieda

Multiple access system for communication network

A cross-point type switch includes a plurality of basic elements arranged in rows and columns so as to form a matrix arrangement of the basic elements. Each of the basic elements includes a plurality of input ports, output ports, expanded input ports and expanded output ports. A write/read part is connected to a common memory and has the function of writing data into the common memory and reading out the data from the common memory. A selector part selectively outputs either the data read out from the common memory or data from the expanded input ports to the output ports. The expanded output ports are directly connected to the input ports.

Cross-point type switch using common memories

A UPC circuit fault diagnosis system for diagnosing a failure in a UPC circuit controls cell traffic volume on the basis of prescribed information about cell traffic. Failure diagnosis of a UPC circuit is provided by a usage parameter determination of at least one kind of cell, using more than one system and comparing determination results. The diagnosis system has an operating UPC circuit for controlling a total of m kinds of cells, and a standby UPC circuit for controlling a total of n kinds of cells. The system also has a total of q bridge memories for keeping a chronological record of the prescribed information of arriving cells. A fault diagnosis of the bridge memories is provided by comparing the contents of the bridge memories, using more than one system.

Trouble diagnosis system of UPC circuit

A usage parameter control circuit for effecting a policing control in an ATM transmission network, comprising a time interval measuring unit for measuring a time interval between a current arrival time of a cell to be judged, and an arrival time of a cell which arrived a reference threshold number of cells before the currently arriving cell arrives; and a judging unit for judging whether or not the measured time interval is shorter than a reference threshold time interval, whereby a longer accessing time is allowed and the circuit construction has a flexible expandability.

Usage parameter control circuit for effecting policing control in an ATM

A switch includes a plurality of memories respectively having write terminals connected to input ports and output terminals, each of the memories including an input acknowledgement signal generating block for generating an input acknowledgement signal when data is received thereto. A multiplexer, which is coupled between the read terminals of the memories and an output port, connects one of the memories to the output port in response to a port number signal. An output controller, which is coupled to the memories and the multiplexer, receives the input acknowledgement signal from each of the memories in order of receipt and generating the port number signal so that data stored in the memories is selected by the multiplexer in order of receipt of the input acknowledgement signal.

Switch coupled between input and output ports in communication system

Inter-network connecting system

A communication system containing a master station and a plurality of slave stations. The master station receives a request from one of the plurality of slave stations and memorizes one or more requests from one or more slave stations. The master station also sends a request sending allowance signal which addresses one of the plurality of slave stations to give an allowance to send a request for sending data, and sends a data sending allowance signal which addresses one of the plurality of slave stations to give an allowance to send data, according to a request which is memorized. Each of the slave stations detects a request sending allowance signal which addresses its own slave station, and a data sending allowance signal which addresses its own slave station. Each of the slave stations also sends a request for sending data to the master station when its own slave station detects a request sending allowance signal which addresses its own slave station. In addition, each slave station sends data to the master station when its own slave station detects a data sending allowance signal which addresses its own slave station.

Communication system carrying out polling for request and data

A digital signal transmission system includes a synchronization pattern detection circuit for detecting a synchronization pattern in response to a received transmitted digital signal, a pseudo synchronization detection circuit for detecting a pseudo synchronization pattern in the form of cyclic redundancy code in response to a received transmitted digital signal, and a synchronization protection circuit for counting the synchronization pattern detection signals produced when synchronization patterns are detected in response to a synchronization pattern detection signal from the synchronization pattern detection circuit. The synchronization protection circuit includes a main synchronization counter circuit and an auxiliary synchronization counter circuit. The count of protection steps for the confirmation of synchronization recovery of the auxiliary synchronization counter circuit in accordance with synchronization or asynchronization of the main synchronization counter circuit is variable.

Digital signal transmission system having frame synchronization operation

Growing community of inventors

Kawasaki, Japan

Hiroshi Takeo