Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Hiroshi Suenaga

Osamu Shibata

Yoshiyuki Saito

Shinichiro Nishioka

Kohei Masuda

Toru Iwata

Yoshihide Komatsu

Takaharu Yoshida

Takeshi Nakayama

Masayuki Toyama

Tadashi Ono

Tsutomu Sekibe

Noriaki Takeda

Isao Kato

Hideyuki Yamada

Kyoko Hirata

Yutaka Nakamura

Tsutomu Sakata

Atsushi Shinkai

Yutaka Taguchi

Hiroshi Tanaka

Tsuyoshi Ikushima

Mika Nakamura

Yukihiro Fukumoto

Chie Sasaki

Masashi Suzuki

Provided is a contactless communication system in which each device performing communication in the system includes a dipole antenna having a length which is less than half of wavelength of a clock frequency of digital baseband signals which are communicated. The dipole antennas are disposed in opposing positions to one another. The contactless communication system performs short distance contactless communication of the digital baseband signals using a frequency band which does not include a resonant frequency of the dipole antennas.

Contactless communication system and dipole antenna

A signal transmission device includes a differential driver, a first single-ended driver circuit block, a second single-ended driver circuit block, a control circuit, and a common-mode filter. In the case where two-channel single-ended transmission is performed by using the first and second single-ended driver circuit blocks, the control circuit controls a driving capability of the first single-ended driver circuit block and a driving capability of the second single-ended driver circuit block in accordance with a combination of a change in a logical value of an output signal of the first single-ended driver circuit block and a change in a logical value of an output signal of the second single-ended driver circuit block.

Signal transmission device, signal transmission system, signal transmission method, and computer device

In a communications system for differential signals, a driver circuit is connected to a receiver circuit by a pair of differential signal lines. When data is not being transmitted, the differential signal lines are maintained at a predetermined electric potential, and when data is to be transferred, a differential signal is output at predetermined electric potentials. The receiver circuit switches between a power-down state and a normal state when detecting states of the electric potentials of the differential signal lines.

Driver circuit, receiver circuit, and method of controlling a communications system including the circuits

A high-speed interface connector is used for connecting a cable or a memory card each having a differential transmission system signal pin arrangement including a pair of differential transmission signaling pins that are adjacent to each other and two stable potential pins provided on both sides of the pair of differential transmission signaling pins, the two stable potential pins having potentials different from each other. The connector includes: a first and a second contact terminals for differential transmission respectively connected to the pair of differential transmission signaling pins; and a third and a fourth contact terminals provided on both sides of the first and the second contact terminal, the third contact terminal adjacent to the first contact terminal being connected to one of the two stable potential pins, and the fourth contact terminal adjacent to the second contact terminal having a potential identical to that of the third contact terminal.

High-speed interface connector

To aim to provide an interface circuit that supports both a single-ended method and a differential method as a transmission method, and one of pairs of input terminals for a differential signal is shared to input/output a single-ended signal. A differential signal receiving circuit that receives a differential signal input through the pair of shared terminals is activated when a differential signal is input to a pair of dedicated input terminals for a differential signal, which is different from the pair of shared terminals. After the differential signal receiving circuit is activated, the active state is maintained by a built-in controller. Accordingly, the activation of the differential signal receiving circuit that receives a differential signal input through the shared terminals is controlled by controlling the differential signal input through the pair of dedicated input terminals, and furthermore, the possibility that the differential signal receiving circuit becomes inactive at an unexpected timing is reduced to a low level.

Interface circuit and interface system

A signal transmission device including: a differential signal transmission unit having two output terminals for outputting a differential signal to a paired signal lines including first and second signal lines; a single-ended signal transmission unit having two output terminals for outputting independent two-channel single-ended signals to the paired signal lines; and a filter unit having first and second common mode filters. One terminal of the differential signal transmission unit and one terminal of the single-ended signal transmission unit are connected to the first signal line via one inductor of the first common mode filter of the filter unit. The other one terminal of the differential signal transmission unit and the other one terminal of the single-ended signal transmission unit are connected to the second signal line via one inductor of the second common mode filter of the filter unit.

Signal transmission device

A comparator circuit compares a test pattern generated by a test pattern generator circuit, with a test pattern transmitted to a memory card and returned from the memory card. A control circuit determines a bandwidth corresponding to frequency components correctly transmitted between a host apparatus and the memory card, based on the returned test pattern, and selects an encoding method requiring a maximum available bandwidth. The control circuit generates a notification message indicating the selected encoding method, and encodes the notification message using the selected encoding method, and transmit the encoded notification message to the memory card. The control circuit establishes communication between the host apparatus and the memory card, when receiving a response message including an acknowledgement to the notification message, from the memory card.

Proximity contactless communication apparatus capable of selecting appropriate encoding method according to bandwidth between antennas

A data transmission system comprises: a pair of transmission lines connecting a plurality of apparatuses; a bridge termination resistor connected between the transmission lines and having a resistance value matching a differential impedance of the transmission lines; a first switch connecting the bridge termination resistor to the transmission lines when being turned on, and disconnecting the bridge termination resistor from the transmission lines when being turned off; pull-up/down resistors connected between the transmission lines and a fixed voltage node, and having resistance values respectively matching characteristic impedances of the transmission lines, the fixed voltage node being a power supply or a ground; and second switches connecting the pull-up/down resistors between the transmission lines and the fixed voltage node when being turned on, and disconnecting the pull-up/down resistors from the transmission lines when being turned off.

Data transmission system capable of transmitting interrupt signal without interrupt gate period

A host device and a slave device are set to a full-duplex mode by temporarily switching the communication direction of a first transmission channel or a second transmission channel after completing transmission and reception of a predetermined number of data packets in the half-duplex mode. The host device or the slave device can thus transmit an interrupt request, such as a request associated with a wait status or a busy status, to its communication target using the temporary full-duplex mode. This enables the host device or the slave device to process such an interrupt request during high-speed data transfer performed in the half-duplex mode.

Interface device, communications system, non-volatile storage device, communication mode switching method and integrated circuit

A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.

Data communication system, communication device, and communication method

It is an object of the invention to inhibit a drop in the data transmission efficiency due to the transmission of an interrupt signal. The invention provides a signal transmission method that is characterized in that a reception side and a transmission side partition data into a plurality of data fragments and send and receive the plurality of data fragments over at least two transmission lines, in that the transmission side transmits first data fragments of the plurality of data fragments over a first transmission line of the transmission lines, transmits data packets that include header information, a second data fragment that has the same bit length as the first data fragments, and footer information over a second transmission line other than the first transmission line, and transmits the first data fragments and the second data fragments in synchronization, and in that an interrupt signal for controlling the transmission side is transmitted from the reception side to the transmission side in a time slot that is an interval between first data fragments that are adjacent on the first transmission line.

Method, device, and system for transmitting data fragments over multiple transmission lines and techniques for stopping data transmission

An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.

Interface circuit that can switch between single-ended transmission and differential transmission

A card controller receives data from a recording card via a socket. A read clock is transmitted in a main transmission wiring, and the data is transmitted in a data transmission wiring. The read clock is withdrawn from the card controller by an outgoing transmission wiring and retrieved into the card controller by an incoming transmission wiring. A transmission delay amount of the outgoing transmission wiring is equal to that of the main transmission wiring, and a transmission delay amount of the incoming transmission wiring is equal to that of the data transmission wiring. The card controller receives the data in synchronization with the read clock retrieved by the incoming transmission wiring.

Host device

An object of the present invention is to provide a technique to improve the data transmission efficiency which allows correct reception of the data at the same time. A removable memory device that transmits/receives data to and from a host terminal, which includes: a clock reception section that receives a transmission/reception clock, which is used for transmitting/receiving data between the host terminal and the removable memory device, from the host terminal; a phase synchronization pattern generation section that generates a phase synchronization pattern, which is for adjusting a phase of internal reception clock which the host terminal incorporates for receiving data from the removable memory device, based on the transmission/reception clock; and a transmission section that transmits the generated phase synchronization pattern to the host terminal, and in which the phase synchronization pattern includes a first level signal which lasts for at least two cycles, and a second level signal which follows the first level signal and lasts for one cycle, is provided.

Growing community of inventors

Osaka, Japan

Hiroshi Suenaga