Kabushiki Kaisha Toshiba

Hiroshi Shimomura

Masaru Numano

Miki Hidaka

Shigeyuki Sakura

Hiroshi Suzunaga

Osamu Takata

Masayuki Sugizaki

Yukiko Takiba

Masahito Nishigoori

A light receiving element includes: a semiconductor layer; an insulating layer; an interconnect layer; and a film. The semiconductor layer includes a light receiving unit configured to convert a signal light incident on the light receiving unit into an electrical signal. The insulating layer is provided on the semiconductor layer. The interconnect layer is provided on the insulating layer. The film is provided on the insulating layer to cover the light receiving unit and be connected to the interconnect layer, the film being made of a metal or a metal nitride.

Light receiving element and optically coupled insulating device

According to an embodiment, a light-receiving circuit includes a MOSFET, a first light-receiving element and a second light-receiving element. The first light-receiving element controls a state of the MOSFET between ON state and OFF state by applying a voltage induced by a light signal between a gate of the MOSFET and a source of the MOSFET; and a second light-receiving element controls a threshold voltage of the MOSFET.

Light receiving circuit

According to one embodiment, an integrated circuit includes a first external terminal, a second external terminal, a third external terminal grounded, an output transistor connected to the second and third external terminals, an ESD protection circuit connected between the second external terminal and the third external terminal, a diode connected between the first and second external terminals, a power supply circuit connected between the first and third external terminals, an internal circuit connected between the power supply circuit and the third external terminal, a current source circuit, and a drive circuit having a first and second input terminals and an output terminal connected to the control electrode of the output transistor. When a voltage larger than a maximum rating voltage is applied to the second external terminal, the drive circuit turns off the output transistor and the ESD protection circuit operates.

Integrated circuit

According to one embodiment, an integrated circuit includes a power supply terminal, an output terminal, a high side output transistor including a first electrode connected to the power supply terminal, a second electrode connected to the output terminal, and a control electrode, a transistor which is connected between the control electrode and the second electrode of the high side output transistor and which short-circuits the control electrode and the second electrode in an on state, a trigger circuit connected between the power supply terminal and the control electrode of the transistor, and an Electro Static Discharge (ESD) protection circuit connected between the power supply terminal and the output terminal. When a voltage larger than a maximum rating voltage is applied to the power supply terminal, the trigger circuit operates, the transistor turns on, the high side output transistor turns off, and the ESD protection circuit operates.

In one embodiment, a semiconductor integrated circuit includes a power source circuit connected to a terminal of a first high potential side power source and outputs a voltage of a second high potential side power source, and an output transistor outputting an output signal to an output terminal. A cathode of a first diode is connected to the terminal of the first high potential side power source and an anode thereof is connected to the output terminal. A current source and a capacitor are connected between a terminal of the second high potential side power source and the terminal of a low potential side power source. A signal from a connection node of the current source and the capacitor and a control signal are inputted to a logic circuit, and the logic circuit outputs a signal obtained by a logic operation to the control terminal of the output transistor.

Growing community of inventors

Fukuoka-ken, Japan

Hiroshi Shimomura