Hitachi, Ltd.

Other

Hitachi Ulsi Engineering Corp.

Hitachi Koki Co., Ltd.

Hitachi Vlsi Engineering Corp.

Nissan Motor Company Limited

Elpida Memory, Inc.

Hitachi Device Engineering Co., Ltd.

Hiroshi Sato

Shoji Kubono

Takayuki Kawahara

Tetsuya Tsujikawa

Keiichi Yoshida

Kazuyuki Miyazawa

Naoki Yamada

Katsutaka Kimura

Masahiro Aoki

Hiroaki Kotani

Atsushi Nozoe

Korefumi Tashiro

Satoshi Noda

Naoki Miyamoto

Toshinori Harada

Nobuyasu Kanekawa

Makoto Nohmi

Keisuke Bekki

Shoji Suzuki

Tomonobu Tsuchiya

Shinya Ohtsuji

Akira Taike

Yoshimichi Sato

Masaaki Komori

Takashi Yamazaki

Kazuhisa Uomi

Shinji Tsuji

Tsurugi Sudoh

Makoto Takahashi

Hiroshi Abe

Takeshi Furuno

Kazunori Shinoda

Masashi Wada

Seiko Suzuki

Noritsugu Takahashi

Makoto Suzuki

Nobusuke Toukura

Akira Onose

Hiroshi Narita

Masayoshi Suzuki

Takeshi Kitatani

Michimasa Horiuchi

Seishin Kirihara

Hisakatsu Kiwaki

Masahito Takahashi

Toshimi Matsumoto

Yuichiro Sasaki

Kenji Niwa

Kyozo Tachibana

Tsutomu Onuma

Kouichi Kuroda

Sho Kusumoto

Takamasa Hori

Naoya Eto

Takuma Nonaka

Shizuka Shimanuki

Genichi Matsumoto

Kunio Saito

Yoshio Okumura

Yoshihiro Sato

Ryoji Tuchida

Takeshi Nakamura

Isao Ishida

A method and system for determining an optimal improvement measure for a product assembling time and a defective assembly generated in an assembling process. This is achieved by extracting an assembling element having a high assembling time and a high defective assembly potential from similar assembling operations and extracting a concrete improvement guideline from extracted improvement guidelines and the parts, the assembling operations, and the attributes associated with the extracted improvement guidelines.

Method and system for supporting design

In a system according to the present invention, when there occurs a failure or problem phenomenon in a new case example of designing, assembling components (parts, assembling operations and attributes thereof) are input. Failure influence indices are calculated for the assembling components respectively based on assembling operation/attribute coefficients. Assembling components to be improved are extracted, and specific solutions built for the assembling components respectively are displayed on a display so that a specific solution can be selected therefrom. Specific risks expected for the selected solutions respectively are built. The specific solutions and the specific risks are displayed on the display so as to be associated with each other.

Design support method and design support system

In a nonvolatile semiconductor memory device in which a plurality of threshold values are set to store multi-level data in a memory cell, bits of multi-bit data are separately written into a memory cell according to an address signal or a control signal to effect the reading and erasing. Concretely, the memory array is so constituted that it can be accessed by three-dimensional address of X, Y and Z, and multi-bit data in the memory cell is discriminated by the Z-address.

Non-volatile multi-level semiconductor flash memory device and method of driving same

The semiconductor optical device is mounted junction down on a mounting plate via the solder metal of the mounting plate. The electrode of the semiconductor optical device facing the mounting plate is partially coated with a dielectric film and the dielectric film is in contact with the solder metal on the mounting plate. The reaction between the semiconductor optical device and the solder metal of the mounting plate can be suppressed without deteriorating the thermal conductivity between the semiconductor optical device and the mounting plate. Therefore, it is possible to improve the reliability of the semiconductor optical device mounted in the junction down form since diffusion of the solder metal into the semiconductor can be prevented.

Optoelectronic waveguiding device, structural body including the same, and optical module

Non-volatile multi-level, semiconductor flash memory device and method of driving same

An optical transmission device suitable for a high-speed and large-capacity optical transmission system. An optoelectronic waveguiding device including an optical waveguide layer and cladding layers each having a larger band gap than that of the optical waveguide are deposited above and beneath the optical waveguide layer formed on a semiconductor substrate. The waveguide and cladding layers comprise optical waveguides each having a MQW structure in a direction of a light propagation axis of the optical waveguide layer. Among these optical waveguides, there exists first and second optical waveguides, whose layer structures may be mutually different. The optoelectronic waveguiding device maybe characterized in that an optical waveguide made of a bulk crystal exists in a connection part between the MQW structure waveguides each having a different layer structure. The specific connected optoelectronic waveguiding device elements may include semiconductor lasers, modulators and/or amplifiers.

Optoelectronic waveguiding device and optical modules

Manufacturing method of semiconductor laser diode

In a nonvolatile semiconductor memory in which multiple-value information is stored in one memory cell by setting a plurality of threshold values, data is successively read from word lines while continuously changing the word-line read level from a lowest level to a highest level, and the next bit line is selectively precharged in accordance with the data stored in latch means for storing read data.

Nonvolatile semiconductor memory and read method

An optical transmission device particularly adapted to a high-speed and large-capacity optical transmission system with a large optical output and excellent reflection resistance includes a waveguide-type optical element for emerging light and an optical transmission path that is to be optically coupled to the waveguide-type optical element. The waveguide-type optical element includes, at least in part thereof, a light-emitting portion having a gain-coupled diffraction grating and a mode-converting region integrated with the light-emitting portion.

Optical transmission device

A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing means provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also comprises comparison means for comparing a signal output of the synthesizing means with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.

Logic circuit having error detection function, redundant resource management method, and fault tolerant system using it

A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

Semiconductor integrated circuit and data processing system

Growing community of inventors

Ome, Japan

Hiroshi Sato