Kabushiki Kaisha Toshiba

Matsushita Electric Industrial Co., Ltd.

Toshiba Memory Corporation

Mitsubishi Electric Corporation

Canon Kabushiki Kaisha

Mitsubishi Denki Kabushiki Kaisha

Kioxia Corporation

Sony Corporation

Oki Electric Industry Co., Ltd.

Tsubakimoto Chain Company

Honda Motor Co., Ltd.

Konica Minolta, Inc.

Hitachi Construction Machinery Co., Ltd.

Matsushita Electronics Corporation

Jfe Steel Corporation

Hiroshi Nishimura

Shinichi Kanno

Hideki Yoshida

Naoki Esaka

Hiroshi Murayama

Masahiro Imai

Shinichi Ogawa

Seizo Hayashi

Koji Hisano

Takayuki Kifuku

Shigeki Ohtagaki

Shinichiro Kawabata

Osamu Sakata

Kazumasa Tanaka

Munenori Yamamoto

Katsuhiko Ohmae

Makoto Saito

Sakiko Yamaguchi

Tetsuya Murano

Ken Kato

Yuichi Ozawa

Yasuhito Iguchi

Shiro Tateishi

Tatsuya Yamada

Seiichi Ohta

Rikako Sakai

Tsuyoshi Konishi

Koichi Hosomi

Kunihiko Chiba

Kazuo Kikuta

Yutaka Inagaki

Masaru Koshimizu

Naoki Sawai

Koichi Tanaka

Takashi Sato

Takashi Nishimura

Shunichi Wada

Atsushi Shimada

Koichi Ito

Chiaki Fujimoto

Akira Sato

Shinya Otsu

Kazunobu Nagai

Yuji Takatsuka

Kazuhisa Yamamoto

Hideo Eto

Ichiro Tono

Hidenori Kitamura

Taketsugu Yao

Yoshitomo Nakamura

Isamu Nitta

Akira Matsubara

Kentaro Ishii

Hideki Akita

Kunio Tani

Shigeyuki Takagi

Yoshitomo Nakano

Osamu Gokita

Hiroshi Mori

Tetsuya Yashiki

Hirokazu Izawa

Kazuo Hirabayashi

Michiaki Ito

Kiyotatsu Iwanami

Michitaka Tsuboi

Nobuichi Nishimura

Hideo Okubo

Hiroshi Hayakawa

Kazunari Okada

Kiyoshi Hashizume

Kazutoshi Tani

Mamoru Shiraki

Tomomi Mitani

Kota Tsuchie

Hisayoshi Kohara

Masato Sawada

Ryusuke Mitamura

Takayuki Hirano

Daisuke Naka

Satoshi Mita

Yoshinori Kaneda

Tooru Imai

Yoshiaki Murata

Shuji Tomimatsu

Makoto Ikeda

Seiji Onoue

Ichiro Tohno

Tatsuya Ooyabu

Tatsuo Ogawa

Tomonori Katoh

Haruhisa Miyake

Kiyokazu Uno

Yuuji Takai

Yasutaka Hirayama

Tomomi Sugai

Motohiro Norikawa

Akira Ejiri

Minoru Fujisaki

Hajime Maezawa

Nobuo Yanaka

According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.

Memory system and method for controlling nonvolatile memory

A memory system including: a nonvolatile memory; first and second decoders configured to execute first and second error correction for correcting data read from the nonvolatile memory; and a controller configured to receive a first command issued by a host device, the first command being a command that requests neither reading nor writing data from or to the nonvolatile memory and that includes information indicative of acceptable latency of error correction, in response to receiving the first command, select one of the first decoder and the second decoder based on the received first command, and after receiving the first command, output data read from the nonvolatile memory through the selected one of the first decoder and the second decoder to the host device.

Memory system, host device and information processing system for error correction processing

A resin composition includes a resin or a resin precursor, and a nitrogen-containing aromatic heterocyclic compound. The nitrogen-containing aromatic heterocyclic compound has a structure represented by the following general formula (1), the following general formula (6) or the following general formula (7): In the general formula (1), A1 and A2 each represent a 6-membered nitrogen-containing aromatic heterocyclic ring together with a nitrogen atom, and the 6-membered nitrogen-containing aromatic heterocyclic ring optionally forms a fused ring; and L represents a single bond, or a linking group derived from an aromatic hydrocarbon ring, an aromatic heterocyclic ring, or an alkyl group. The resin composition includes the nitrogen-containing aromatic heterocyclic compound in a range from 0.10 to 30% by mass relative to the resin or the resin precursor.

Resin composition and electronic device

Provided are: a stabilizer composition capable of imparting a vinyl chloride resin with excellent thermal stability, coloration resistance, and thermal coloration resistance; a vinyl chloride resin composition containing the same and a molded article of the composition. The stabilizer composition contains, with respect to 100 parts by mass of a component (A): 5 to 700 parts by mass of a component (B) and 5 to 200 parts by mass of a component (C). The component (A) is at least one organic acid zinc salt, the component (B) is at least one selected from the group consisting of organic acid barium salts, overbased barium carbonates, organic acid calcium salts and overbased calcium carbonates, and the component (C) is at least one hindered amine-based light stabilizer.

Stabilizer composition, vinyl chloride resin composition containing same, and article molded therefrom

According to one embodiment, a memory system includes a nonvolatile memory and a controller which controls the nonvolatile memory. The controller notifies to an outside an extensive signal which indicates a predetermined state of the nonvolatile memory or the controller.

According to one embodiment, a memory device includes a first memory, a control circuit controlling the first memory, and a second memory storing a second program. The second program manages management information associated with the first memory, sends the management information conforming to a specific interface to a first program if a command conforming to the specific interface is an output command to output the management information. The second program receives first information conforming to the specific interface and issued by the first program, translates the first information into second information corresponding to the second program, translates the second information into third information corresponding to the control circuit, and executes processing for the first memory in accordance with the third information.

Memory device managing data in accordance with command and non-transitory computer readable recording medium

According to one embodiment, a storage includes a nonvolatile memory and a controller configured to control the nonvolatile memory. The storage is supplied with first power from a power supply unit. The controller is configured to change power supplied from the power supply unit from the first power to second power based on a power control command transmitted from a host. The power control command includes a first parameter identifying the storage and a second parameter indicative of the second power.

Storage and storage system

In an electric power steering device, if a semiconductor switching element is used between a battery and a bridge circuit for opening and closing a current path, this arises a problem of generation of heat by an ON resistance; for this reason, a current flowing through the semiconductor switching element is limited if a difference between the gate voltage and the source voltage of the semiconductor switching element is smaller than or equal to a predetermined value.

Electric power steering device

It takes a processing time to perform a security process on a time synchronization message, thus the difference of a delay time required for the security process can be made between a time at which the time synchronization message is actually transmitted and a transmission time assigned to the time synchronization message, and therefore, the difference between the actual transmission time of the time synchronization message and the assigned transmission time needs to be reduced. In generation of a secure time synchronization message in the synchronization system according to embodiments of the present invention, most of the security processes is performed in an upper layer which is an MAC layer or a higher layer, and processes including the assignment of the transmission time and assignment of authentication information for authenticating validity of the transmission time are performed in a physical layer.

Synchronization system and communication device

A wireless communications device includes: a wireless transmission and reception section configured to transmit and receive packets by wireless communication; a time management section configured to manage time at the device; and a time synchronization processing section configured to execute time synchronization processing of the time managed by the time management section, using a time acquisition source, the time synchronization processing section transmitting, via the wireless transmission and reception section, a time correction report packet specifying the time that has been executed by the time synchronization processing using the time acquisition source.

Wireless communications with time synchronization processing

Growing community of inventors

Tokyo, Japan

Hiroshi Nishimura