Kioxia Corporation

Toshiba Memory Corporation

Kabushiki Kaisha Toshiba

Hiroshi Nakaki

Megumi Ishiduki

Takamasa Ito

Yasuhito Yoshimizu

Wataru Sakamoto

Hanae Ishihara

Takashi Maegawa

Masaru Kito

Kei Sakamoto

Shigeki Kobayashi

Keisuke Nakatsuka

Jun Iijima

Jun Nishimura

Tatsuya Okamoto

Keisuke Suda

Yu Hirotsu

Yosuke Mitsuno

Ayaha Hachisuga

Hisashi Harada

Yukie Miyazaki

Kazuaki Nakajima

A semiconductor device of the embodiment includes a stacked body, a first insulating layer, first and second staircase portionsand a second insulating layerThe stacked body includes a first electrode layer(WLDD) and a second electrode layer(SGD). The first and second staircase portionsare provided in a first end portiona second end regionThe second insulating layerextends in the X-direction. The second insulating layer divides the second electrode layer(SGD) in the X-direction direction. A length Lin the X-direction of the second insulating layeris longer than a length Lin the x-direction of the second electrode layer(SGD) and shorter than a length Lin the X-direction of the first electrode layer(WLDD).

Semiconductor device for preventing an increase in resistance difference of an electrode layer

According to an embodiment, a semiconductor memory device includes a first memory cell array, a second memory cell array, and a row decoder. The first memory cell array includes a first select transistor, a first memory cell, a second select transistor, a first word line, a first select gate line, and a second select gate line. The second memory cell array includes, a third select transistor, a second memory cell, a fourth select transistor, a second word line, a third select gate line, a fourth select gate line. The first word line and the second word line are commonly coupled to the row decoder. The first select gate line, the second select gate line, the third select gate line, and the fourth select gate line are separately coupled to the row decoder.

Semiconductor memory device with plurality of arrays

A semiconductor storage device includes a stacked body in which conductive and insulating layers are alternately stacked in a first direction, conductive lines extending along a second direction intersecting the first direction and arranged along a third direction intersecting the first and second directions, insulators extending along the first and third directions in the body, arranged along the second direction, and dividing conductive layers, columnar bodies extending along the first direction and arranged along the second direction between insulators, each columnar body including a semiconductor body forming memory cells, and vias each connected between a conductive line and a corresponding columnar body. The conductive lines include first through fourth lines, and the columnar bodies include first through fourth bodies, arranged in this order. When viewed from the first direction, the first through fourth columnar bodies respectively overlap and are electrically connected to the first, third, second, and fourth lines.

Semiconductor storage device

A semiconductor device includes a base body, a stacked body on the base body and a first columnar part. The base body includes a substrate, a first insulating film on the substrate, a first conductive film on the first insulating film, and a first semiconductor part on the first conductive film. The stacked body includes conductive layers and insulating layers stacked alternately in a stacking direction. The first columnar part is provided inside the stacked body and the first semiconductor part. The first columnar part includes a semiconductor body and a memory film between the semiconductor body and conductive layers. The semiconductor body extends in the stacking direction. The first columnar part has a first diameter and a second diameter in a first direction crossing the stacking direction. The first diameter inside the first semiconductor part is larger than the second diameter inside the stacked body.

Nonvolatile semiconductor memory device including a memory cell

A semiconductor storage device includes first and second stacks, and first to fourth semiconductor layers. The first stack includes first conductive layers and first insulating layers alternately stacked in a first direction. The first semiconductor layer extends through the first stack. The second semiconductor layer extends in a second direction above the first stack and connected to the first semiconductor layer. The second stack includes second conductive layers and second insulating layers alternately stacked in the first direction. The first and second stacks are arranged in a third direction. The third semiconductor layer extends through the second stack. The fourth semiconductor layer extends in the second direction above the second stack and connected to the third semiconductor layer. A third conductive layer is in contact with upper surfaces of the second and fourth semiconductor layers. The second and fourth semiconductor layers are separated from each other in the third direction.

In one embodiment, a semiconductor device includes a first substrate, and a plurality of electrode layers provided above the first substrate and stacked in a first direction. The device further includes a first semiconductor layer extending in the first direction in the plurality of electrode layers, and a metal layer provided above an uppermost one of the plurality of electrode layers and extending to cross the first direction. The device further includes a second semiconductor layer including an impurity diffusion layer that is provided between the first semiconductor layer and the metal layer, electrically connects the first semiconductor layer with the metal layer, and has an impurity concentration higher than an impurity concentration of the first semiconductor layer.

Semiconductor device and method of manufacturing the same

A semiconductor storage device includes first wiring layers stacked along a first direction, a first pillar including a first semiconductor layer and extending along the first direction through the first wiring layers, a second wiring layer disposed above the first pillar in the first direction and extending along a second direction perpendicular to the first direction, a semiconductor-containing layer including a first portion disposed on an upper end of the first pillar in the first direction, a second portion contacting the first portion and formed along the second wiring layer, and a third portion contacting an upper end of the second portion and extending along a third direction perpendicular to the first direction and crossing the second direction, and a first insulating layer between each of the first and second portions of the semiconductor-containing layer and the second wiring layer. An upper surface of the third portion contains a metal.

Semiconductor storage device and method for manufacturing semiconductor storage device

According to one embodiment, a semiconductor storage device includes: a plurality of first wiring layers stacked in a first direction; a first memory pillar including a first semiconductor layer extending in the first direction and penetrating the plurality of first wiring layers; a second wiring layer disposed above the first semiconductor layer; a second semiconductor layer including a first part disposed between the first semiconductor layer and the second wiring layer, a second part extending away from the first semiconductor layer, and a third part provided on the second part; a first insulating layer disposed between the first part and the second wiring layer and between the second part and the second wiring layer; and a second insulating layer provided on the first insulating layer and in contact with at least a portion of the second part.

Semiconductor storage device and method for manufacturing the same

In one embodiment, a semiconductor wafer includes a first substrate, a first insulator provided on the first substrate, and a plurality of first pads provided in the first insulator. The wafer further includes a second insulator provided on the first insulator, a plurality of second pads provided on the first pads in the second insulator, a stacked film alternately including a plurality of first insulating layers and a plurality of second insulating layers provided in the second insulator, and a second substrate provided on the second insulator. Furthermore, the first insulator and the second insulator are connected to each other between an edge face of the first insulator and an edge face of the second insulator, and the second insulator intervenes between the first insulator and the stacked film at the edge faces of the first and second insulators.

Semiconductor wafer and method of manufacturing the same

Semiconductor device

According to one embodiment, storage device comprises first wiring layers stacked along a first direction and a memory pillar extending through the first wiring layers. The memory pillar includes a first semiconductor layer. A second wiring layer is above an upper end of the memory pillar. A second semiconductor layer has a first portion between the first semiconductor layer and the second wiring layer and a second portion extending away from the first semiconductor layer. A first insulating layer is between the first portion and the second wiring layer in first direction, and also between the second portion and the second wiring layer in a second direction intersecting the first direction.

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Yokkaichi, Japan

Hiroshi Nakaki