Spansion Llc.

Hiroshi Murai

Masahiko Higashi

Masatomi Okanishi

Yoshihiro Mikasa

The present invention provides a semiconductor device and a method for manufacturing thereof. The semiconductor device includes bit lines disposed in a semiconductor substrate, a first ONO disposed between the bit lines on the semiconductor substrate, and a second ONO film disposed on each of the bit lines. The film thickness of a first silicon nitride film in the first ONO film is larger than the film thickness of a second silicon nitride film in the second ONO film.

Sonos device with insulating storage layer and P-N junction isolation

A semiconductor device and a method for manufacturing thereof are provided. The semiconductor device includes two epitaxial semiconductor layers formed on a semiconductor substrate, bit lines formed on upper portions of the two epitaxial semiconductor layers, and a charge storage layer formed on the semiconductor substrate between the two epitaxial semiconductor layers.

U-shaped SONOS memory having an elevated source and drain

A semiconductor memory includes first and second source regions that are formed in a semiconductor substrate and run in orthogonal directions. The first and second source regions are diffused regions and are electrically connected to each other at crossing portions thereof. The semiconductor device may further include drain regions formed in the semiconductor substrate, bit lines that run in the direction in which the second source region runs, and a source line formed above the second source region, wherein a contact between the source line and the second source region is aligned with contacts between the bit lines and drain regions formed in the semiconductor substrate.

Semiconductor memory and method of fabricating the same

A semiconductor device includes bit lines () provided in a semiconductor substrate (), word lines () provided above the bit lines and running in a width direction of the bit lines (), metal lines () provided above the word lines () and running in a length direction of the bit lines (), and bit line contact regions () running in the length direction of the word lines () and located between word line regions () in which a plurality of word lines () are disposed. Each of the bit lines () is connected with every other metal line () in the bit line contact regions (). It is thus possible to provide a semiconductor device and a fabrication method therefor in which an alignment margin can be ensured between a contact hole () and the bit line () to enable downsizing of a memory cell.

Growing community of inventors

Fukushima-ken, Japan

Hiroshi Murai