Niigata Seimitsu Co., Ltd.

Ricoh Company, Ltd.

Kabushiki Kaisha Toyota Jidoshokki

Neuro Solution Corp.

Foundation for Advancement of International Science

Kabushiki Kaisha Toyota Jidoshokki and Niigata Seimitsu Co., Ltd.

Hiroshi Miyagi

Takeshi Ikeda

Isami Kato

Hiroshi Katsunaga

Shigetoshi Sugawa

Tadahiro Ohmi

Akinobu Teramoto

Akira Okamoto

Takefumi Nishimuta

A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate () comprising a projecting part (B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region () formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.

MIS transistor and CMOS transistor

A basic structure of a reference voltage generation circuit is formed by a buffer amplifier () and a resistive element () without using a band gap regulator. Thus, an influence of a noise of the band gap regulator as in the conventional art is eliminated. There are provided comparators () and () for comparing an input voltage of the buffer amplifier () with an output voltage of a band gap regulator (), and a control circuit () for variably controlling a resistance value of the resistive element () in response to comparison signals. Consequently, even if an output voltage (V) of the buffer amplifier () temporarily fluctuates with a change in a source voltage (V), it returns into a desirable voltage range and converges through a variable control of the resistance value.

Reference voltage generation circuit

There are included an LPF () and an HPF () that are connected in parallel to the output of a pre-emphasis circuit (). There is also included a gain adjusting circuit () that performs a gain adjustment of low-pass filter with respect to the frequency band to be passed through the HPF (). The low frequency components of the frequency band of baseband signals outputted from the pre-emphasis circuit () pass through the LPF (), while the high frequency components pass through the HPF (). As to the outputs from the HPF (), the gain of especially the higher part of the frequency band components to be passed through the HPF () is suppressed by the gain adjusting circuit (), whereby the amplitudes of the baseband signals can be limited only for the high frequency range without using a limiter and further the peak values of the baseband signals can be inhibited from exceeding the maximum frequency deviation.

Harmonic suppressing circuit

An FM transmitter with improved degree of freedom in parts selection comprises: an oscillator connected with a crystal oscillator; a clock generating circuit uses a signal formed by frequency-dividing an oscillator output as a reference frequency, and which generates a clock having a frequency of an integer multiple of the frequency of the reference frequency; a DSP operates synchronously with the clock performing stereo modulation processing, FM modulation processing, and IQ modulation processing to inputted stereo data by digital processing; a frequency synthesizer generates a reference having a frequency an integer multiple of the frequency of the reference; mixers which mix signals outputted from the DSP with signals generated by the frequency synthesizer, respectively; an adder which adds outputs of the mixers; and an amplifier which amplifies an output signal of the adder and transmits the amplified signal from an antenna.

FM transmitter

There are included a first quadrature modulation part () that divides an input signal into an I signal and a Q signal having a phase orthogonal to the phase thereof and uses a baseband frequency to perform frequency conversions of the I and Q signals, thereby performing a quadrature modulation; and a second quadrature modulation part () that uses in-phase and quadrature carriers of FM frequencies, which are 90 degrees out of phase with respect to each other, to perform frequency conversions of the I and Q signals, which are generated by the first quadrature modulation part (), thereby performing a quadrature modulation. Thus, the phases of the I and Q signals, which are shifted by 90 degrees with respect to each other by the first quadrature modulation part (), are further shifted by 90 degrees with respect to each other by the second quadrature modulation part (), thereby providing frequency components the phases of which have been inverted, whereby the unwanted harmonic components at the spurious sides of a target frequency can be attenuated.

Modulating circuit

There are included a signal generating circuit () that generates, based on a comparison signal outputted from a phase comparator () and a clock signal outputted from a crystal oscillation circuit () and having a shorter pulse width than the comparison signal, a control signal obtained from a logical product of the two signals; and a charge pump circuit that performs, based on the control signal from the signal generating circuit (), a charging or discharging operation of a capacitor. The charging or discharging operation of the capacitor is gradually performed little by little based on the control signal having the shorter pulse width than the conversional comparison signal, whereby even if the capacitance value of the capacitor is reduced, the substantial time constant can be enlarged, resulting in a stable operation of a frequency synthesizer.

Frequency synthesizer and charge pump circuit used therein

A frequency synthesizer includes an AND circuit () for detecting whether a frequency synthesizer is in a lock state according to a signal outputted from an Up terminal and a Down terminal of a phase comparator and switching circuits () for switching between presence and absence of connections of constant current circuits () constituting a charge pump circuit () according to the output signal of the AND circuit (). When the AND circuit () has detected a high impedance state of the charge pump circuit (), the switching circuits () disconnects the constant current circuits () by the switching circuits (). Thus, it is possible to eliminate current flowing into the charge pump circuit () without using a control signal from outside such as a power cut signal and an intermittent signal.

Frequency synthesizer and charge pump circuit used for the same

A received signal level is detected in each of a wide band, middle band, and narrow band and each detected signal is converted to a digital signal. A DSPdetermines the enabled/disabled state of an LNAand an attenuatoras well as a gain adjustment amount based on the signal level of each band. For example, the gain adjustment is not performed when the signal level of the narrow band including a desired frequency is not larger than a prescribed value even the signal level of the wide band or middle band is larger than a prescribed value. When the signal level of the narrow band is larger than the prescribed value exceeding a gain adjustable limit level in the attenuator, the gain of the LNAis adjusted, while maintaining the gain adjustable amount in the attenuatoraround the limit level, to reduce the gain as a whole.

Automatic gain control device

A couple of frequency doubler circuitsandwhich multiplys a frequency of a reference oscillation signal outputted from a reference oscillatoris provided, thereby a frequency of a reference oscillation signal, as the greatest common divisor between a frequency (300 KHz) determined by multiplying the frequency (fx=75 KHz) of a crystal oscillatorby four and a frequency (54 KHz) determined by multiplying an assigned frequency per one channel in AM radio broadcasting by a prescribed divide ratio, can be higher than a conventional frequency. This way realizes the decrease of a divide ratio in a programmable counter, resulting in the reduction of the circuit scale, shortening of the lock-up time, and improvement of the S/N ratio.

AM/FM radio receiver and local oscillator circuit used therein

A modulation output device including; a DSPfor subjecting MP3 music data and the like read out from an MP3 playerto stereo modulation, when necessary; D/A converterfor converting the digital data outputted from the DSPto an analog signal and outputting the converted analog signal to either an earphone terminalor transmission part; and transmission partfor transmitting the analog signal outputted from the D/A converterto the outside through a transmission antennaenables the processing concerning reproduction of music data and processing for modulation of the reproduced music data to transmit without wires to be performed by a single DSPand a single D/A converter.

Modulation output device

It is an object of the present invention to provide a variable gain amplifier circuit operable with a low power supply voltage and with less noise generated inside the circuit. In the variable gain amplifier circuit, a third MOS transistor is connected between the respective sources of two MOS transistors constituting a differential amplifier circuit and to the gate of the third MOS transistor, and a DC bias voltage for operating the third MOS transistor in a non-saturated region is supplied. If the output voltage of an AM intermediate frequency variable gain amplifier circuit increases, a control voltage for reducing the resistance between the source and drain of the third MOS transistor is applied to reduce the gain of the AM intermediate frequency variable gain amplifier circuit.

AM intermediate frequency variable gain amplifier circuit, variable gain amplifier circuit and its semiconductor integrated circuit

The oscillating unitgenerates a signal having a frequency of n*f, i.e., n times a target frequency f. The control voltage generation circuitcompares the phase difference between a divided signal of a signal generated in the oscillating unitand the reference signal, and outputs a DC control voltage according to the phase difference to the oscillating unit, thereby controlling an oscillation frequency. The divider circuitconverts a signal generated in the oscillating unitto the target frequency f, by dividing the aforementioned signal into n equal units. By setting the oscillation frequency of the oscillating unit at n times the target frequency, the inductance and the capacitors can be formed on a semiconductor integrated circuit board.

Oscillator circuit

An object of the present invention is to provide a receiver, a digital-analog converter and a tuning circuit in which temperature compensating components can be formed on a semiconductor substrate while reducing component costs. An FM receiveris constituted by including an antenna, a high frequency receiving circuit, a local oscillator, two digital-analog converters (DACs), a control section, a mixing circuit, an intermediate frequency amplification circuit, a detection circuit, a low frequency amplification circuitand the speaker. The DACshave a predetermined temperature coefficient, of which output voltage is changed in accordance with ambient temperature. When a characteristic of VCOis changed with variations of ambient temperature so as to cause a control voltage applied to the VCOto be changed, output voltages of the DACsare also changed similarly.

Receiver, digital-analog converter and tuning circuit

An oscillator capable of reducing a noise component when partly formed by using the CMOS process or the MOS process. A high-frequency amplifier circuit, a mixing circuit, a local oscillator, intermediate-frequency filters, an intermediate-frequency amplifier circuit, a limit circuit, an FM detection circuit, and a stereo demodulation circuit which constitute an FM receiver are formed as a one-chip component. The local oscillatoris formed on a semiconductor substrate by using the CMOS process or the MOS process and the transistors constituting the circuit are p-channel type FETs. Moreover, the local oscillatorhas a resonance circuit whose one end is connected to a DC bias circuit composed of a resistorand the center voltage of the oscillation is set to a value higher than 0 V.

Oscillator with a guard ring formed around an N well and constituent components integrally formed on the N well, on a semiconductor substrate

A limit circuit capable of providing high gain. The limit circuit included in an FM receiver comprises, for example, seven amplifiers (to), and a BPF () inserted substantially in the middle thereof. Each of the amplifiers (to) operates as a differential amplifier, and has a gain of about 13 dB. The BPF () serving as a limit circuit passes components in a bandwidth wider than the bandwidth of the signal to be amplified. The level of 1/f noise and heat noise can be reduced by eliminating low-frequency components and high-frequency components of the Signal amplified by the four amplifiers (to), respectively. Therefore, each of the amplifiers (to) connected to the rear end of the BPF () is not animated by the noise component.

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Jouetsu, Japan

Hiroshi Miyagi