Hitachi, Ltd.

Hiroshi Kosugi

Hirotoshi Shirasu

Kunio Imai

Goro Kusano

Hirofumi Inoue

Yasuhiro Yamamura

A digital-to-analog converter which is effective for an interpolative decoder for decoding a linear PCM signal is disclosed. An output signal of a binary rate multiplier which develops signals of several less-significant bits of the linear PCM signal onto a time axis is directly applied to a driver circuit, by which is driven the segment of a ladder resistance network corresponding to the least significant bit, the ladder resistance network having segments corresponding to signals of several more-significant bits of the linear PCM signal. Thus, an adder for the digital addition between the output signal of the binary rate multiplier and the signals of the several more-significant bits is dispensed with.

Interpolative digital-to-analog converter for linear PCM code

An interpolative PCM decoder converts PCM signals having polarity bits, segment selection bits and uniform quantization bits into an analog signal. The PCM decoder may be used both for .mu.-law and A-law conversion by use of simple circuits and includes an AND gate circuit which produces a logical product between a selection signal for selecting a minimum unit of an analog value of a lower end of a segment and a control signal for change-over between the .mu.-law and the A-law, and a circuit generating the same analog values as the minimum unit of the analog value in accordance with an output of the AND gate circuit.

Interpolative PCM decoder utilized for .mu.-law and A-law

In accordance with the present invention, there is provided an economical and compact frequency sampling filter comprising a comb filter and resonators, in which the difference between the output of a frequency sampling filter of the bandpass type or the low-pass type, or the bandstop type or the high-pass type and the output of a circuit having the same gain as that at each sampling point in the pass band of said filter and having a similarly varying phase to that in the pass band is obtained.

Frequency sampling filter

A multi-frequency signal receiving circuit comprising a check circuit for discriminating the existence of a predetermined number of signal frequencies constituting a signal to produce an output, a timing circuit for delaying the output of the check circuit, a rectifying circuit for receiving the signal to detect the received signal energy and produce an output, a timing circuit for delaying the output of the rectifying circuit, an AND gate circuit for receiving the outputs of the two timing circuits to produce an output, and control means for controlling the transmission of the signal to the output circuit of the receiving circuit in accordance with the output of the AND gate circuit, whereby the normal operation of the receiving circuit can be ensured even when the signal frequencies arrive with a large arriving time difference and the operation start time is quickened.

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Yokohama, Japan

Hiroshi Kosugi