Adv Antest Corporation

Kabushiki Kaisha Riken

Fukuda Denshi Co., Ltd.

Hiroshi Kawamoto

Hironobu Niijima

Soichi Shida

Chuji Shimizu

Toshikatsu Hayashi

Akira Goishi

Yasuaki Onodera

Hiroyoshi Ishii

Misao Kaneko

Kenzo Suzuki

Masayuki Kurihara

A wave absorber is provided which has a wave absorption characteristic of 20 dB in a frequency band of 1 GHz to 20 GHz, is nonflammable, compact and lightweight, and has excellent durability. A porous ferrite is produced as the base material for which is an Ni--Zn type ferrite which has an excellent wave absorption characteristic in the high frequency range, and this serves as a wave absorber formed in the shape of a pyramid or triangular prism.

Porous ferrite wave absorber

Test patterns are applied to an IC under test under a test pattern address by which the first fail is caused and under other test pattern addresses. A defect candidate area is moved to the position where a charged particle beam can scan the area and defect candidate wiring portions are specified. A potential data of the specified wiring is acquired for each of the test patterns and stored in a memory. This process is process performed by sequentially stepping back the stop test pattern addresses. Then, a potential data of the specified wiring in thee specified area is similarly acquired for non-defect IC. The respective potential data of the IC under test and the non-defect IC are compared to locate the mismatch test pattern address and wiring.

Apparatus detecting an IC defect by comparing electron emissions from

Test patterns are applied to an IC under test under a test pattern address by which the first fail is caused and under other test pattern addresses. A defect candidate area is moved to the position where a charged particle beam can scan the area and defect candidate wiring portions are specified. A potential data of the specified wiring is acquired for each of the test patterns and stored in a memory. This process is performed by sequentially stepping back the stop test pattern addresses. Then, a potential data of the specified wiring in the specified area is similarly acquired for non-defect IC. The respective potential data of the IC under test and the non-defect IC are compared to locate the mismatch test pattern address and wiring.

Method and apparatus for detecting an IC defect using charged particle

An IC fault analysis system which is capable of accurately correlating mask layout data and/or net listing data associated with CAD (computer aided design) data developed in the IC design and an image obtained by a non-contact type tester such as an electron beam tester. The IC fault analysis system includes a circuit diagram display for showing a circuit diagram of the IC device under test based on the CAD data, a mask layout display for showing a mask layout of the IC device under test based on the CAD data, a contrast image display for showing a potential distribution of the IC device under test obtained in the non-contact type tester, an input means connected to the circuit diagram display for specifying a circuit component of the IC device under test, a comparison means for comparing the circuit diagram of the circuit component defined by the input means and contrast image corresponding to the circuit component, and a comparison data memory for storing the comparison data of the comparison means and providing the comparison data to the contrast image display.

IC fault analysis system having charged particle beam tester

Method for detecting an IC defect using charged particle beam

The present invention allows to automatically presume a defect location of an IC using an EB tester. Under each of the conditions where a normal power supply voltage and an abnormal power supply voltage are applied to an IC respectively, test patterns are applied to the IC until the pattern address where the first defect is detected by an IC tester. At this point in time, the pattern update is stopped. Then a potential contrast image data is acquired from one of the partitioned segments of the IC surface for each of the above power supply conditions. A diffrence image data between the two potential contrast image data (normal power case and abnormal power case) is generated. This difference image data generation is repeated several times and those defference image data are summed up. A check is made to see if there is a changed portion greater than a predetermined value in each of the segments and if there is, a defect information is stored in a storage portion corresponding to the defect segment. The summed difference image data is acquired from each of all the segments of the IC and then the stop pattern address is decrementsd by one and the same process is repeated. Above process is repeated until no defect segment is detected by decrementing the number of test patterns. When only one segment having a defect is detected, the segment is considered as a real defect segment.

Method and apparatus for detecting an IC defect using a charged particle

An electrocardiographic electrode is disclosed, which comprises an electrode element consisting of a synthetic resin electrode element having a head portion with a lead attached thereto and having a straight recessed portion, a neck portion having an engagement portion narrower than the head portion and capable of being engaged in an expansible member and a straight portion continuous to the straight recessed portion of the head portion and a bottom portion formed under, broader than and supporting the neck portion and to be held in contact with the skin of a living body, the outer surface of the synthetic resin electrode element member being imparted with electric conductivity by coated metal powder, an expansible member engagedly locked in the engagement portion of the neck portion, and an adhesive film consisting of an adhesive, having a central portion and secured to the expansible member to be held in close contact with the skin of the living body.

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Saitama, Japan

Hiroshi Kawamoto