The Furukawa Electric Co., Ltd.

Tohoku University

Fuji Electric Co., Ltd.

Tokyo Electron Limited

Hiroshi Kambayashi

Takehiko Nomura

Seikoh Yoshida

Yuki Niiyama

Tadahiro Ohmi

Yoshihiro Sato

Akinobu Teramoto

Masayuki Iwami

Masatoshi Ikeda, Legal Representative

Nariaki Ikeda

Sadahiro Kato

Shusuke Kaya

Shinya Ootomo

Katsunori Ueno

Kazuhide Hasebe

Hirokazu Ueda

Yuichiro Morozumi

Katsushige Harada

Tatsuyuki Shinagawa

Jiang Li

Tat-Sing Paul Chow

Koh Li

Yuki Niyama

The semiconductor transistor according the present invention includes an active layer composed of a GaN-based semiconductor and a gate insulating film formed on the active layer. The gate insulating film has a first insulating film including one or more compounds selected from the group consisting of AlO, HfO, ZrO, LaO, and YOformed on the active layer, and a second insulating film composed of SiOformed on the first insulating film.

Semiconductor transistor

A method for fabricating a semiconductor device including GaN (gallium nitride) that composes a semiconductor layer and includes forming a gate insulating film, in which at least one film selected from the group of a SiOfilm and an AlOfilm is formed on a nitride layer containing GaN by using microwave plasma and the formed film is used as at least a part of the gate insulating film.

Method for fabricating semiconductor device and the semiconductor device

A field effect transistor has an MOS structure and is formed of a nitride based compound semiconductor. The field effect transistor includes a substrate; a semiconductor operating layer having a recess and formed on the substrate; an insulating layer formed on the semiconductor operating layer including the recess; a gate electrode formed on the insulating layer at the recess; and a source electrode and a drain electrode formed on the semiconductor operating layer with the recess in between and electrically connected to the semiconductor operating layer. The recess includes a side wall inclined relative to the semiconductor operating layer.

Field effect transistor having semiconductor operating layer formed with an inclined side wall

Provided is a method of manufacturing a gallium-nitride-based semiconductor device, comprising forming a first semiconductor layer of a gallium-nitride-based semiconductor; and forming a recessed portion by dry etching a portion of the first semiconductor layer via a microwave plasma process using a bromine-based gas.

Manufacturing method of GaN-based semiconductor device and semiconductor device

A method of producing a semiconductor transistor involving formation of an ohmic electrode on an active layer composed of a GaN-based semiconductor includes a process of forming a first layercomposed of tantalum nitride on an active layerand a second layercomposed of Al layered on the first layerand a process of forming ohmic electrodesandin ohmic contact with the active layerby heat treating the first layerand the second layerat a temperature of from 520&#xb0; C. to 600&#xb0; C.

Method of producing semiconductor transistor

A semiconductor device includes a plurality of electrodes arranged on a compound semiconductor layer grown on a substrate, and a surface protection film that protects a surface of a semiconductor layer on the compound semiconductor layer between the electrodes. A refractive index of the surface protection film is controlled so that a stress caused by the surface protection film on the surface of the semiconductor layer is minimized.

Semiconductor device

A p-type nitride compound semiconductor layer is formed on a buffer formed on a substrate. An n-type contact region is formed by ion implantation under a source electrode and a drain electrode. An electric-field reducing layer made of an n-type nitride compound semiconductor is formed on the p-type nitride compound semiconductor layer. A carrier density of the electric-field reducing layer is lower than that of the n-type contact region. A first end portion of the electric-field reducing layer contacts with the n-type contact region, and a second end portion of the electric-field reducing layer overlaps with a gate electrode.

Field effect transistor and method of manufacturing the same

In a GaN-based semiconductor device, an active layer of a GaN-based semiconductor is formed on a silicon substrate. A trench is formed in the active layer and extends from a top surface of the active layer to a depth reaching the silicon substrate. A first electrode is formed on an internal wall surface of the trench and extends from the top surface of the active layer to the silicon substrate. A second electrode is formed on the active layer to define a current path between the first electrode and the second electrode via the active layer in an on-state of the device. A bottom electrode is formed on a bottom surface of the silicon substrate and defines a bonding pad for the first electrode. The first electrode is formed of metal in direct ohmic contact with both the silicon substrate and the active layer.

GaN-based semiconductor device and method of manufacturing the same

Provided is a normally-off field effect transistor using a III-nitride semiconductor. The transistor is provided with a III-nitride semiconductor layer grown on a substrate by including an acceptor and a donor; a gate insulating film which is formed on the III-nitride semiconductor layer to have a thickness to be at a prescribed threshold voltage based on the concentration of the acceptor and that of the donor; a gate electrode formed on the gate insulating film; a first source/drain electrode formed on the III-nitride semiconductor layer to one side of and separate from the gate electrode, directly or via a high dopant concentration region; and a second source/drain electrode formed away from the gate electrode and the first source/drain electrode, on or under the III-nitride semiconductor layer, directly or via a high dopant concentration region.

Normally-off field effect transistor using III-nitride semiconductor and method for manufacturing such transistor

A field effect transistor formed of a semiconductor of a III group nitride compound, includes an electron running layer formed on a substrate and formed of GaN; an electron supplying layer formed on the electron running layer and formed of AlGaN (0.01&#x2266;x&#x2266;0.4), the electron supplying layer having a band gap energy different from that of the electron running layer and being separated with a recess region having a depth reaching the electron running layer; a source electrode and a drain electrode formed on the electron supplying layer with the recess region in between; a gate insulating film layer formed on the electron supplying layer for covering a surface of the electron running layer in the recess region; and a gate electrode formed on the gate insulating film layer in the recess region. The electron supplying layer has a layer thickness between 5.5 nm and 40 nm.

Field effect transistor

The laser beam with a wavelength having a higher energy than the band gap energy of the material forming the carrier moving layer is irradiated to activate the impurities contained in the constituent layer of the field effect transistor in the method of producing the field effect transistor. The method of the invention does not apply the heating of the substrate or the sample stage to raise the temperature of the semiconductor layer using the thermal conductivity so as to activate the impurities. Thus, the implanted impurities can be activated without deteriorating the performance of the device and reliability.

Method of producing field effect transistor

An optical absorption layer comprised of a substance having a band gap energy smaller than that of GaN is formed on an implanted region formed in a pGaN layer as a ground layer. There is performed an annealing step from an upper surface of a substrate with predetermined light such as infrared light, a red light, or the like, which has energy smaller than the band gap energy of the pGaN layer. The optical absorption layer has an absorption coefficient of the light in the annealing step larger than that of the pGaN layer. Accordingly, it is possible to selectively perform a heat treatment on a region directly under the optical absorption layer or a region in a vicinity thereof (the implanted region).

Process for producing semiconductor device using optical absorption layer

A second semiconductor layer of a second nitride-based compound semiconductor with a wider bandgap formed on a first semiconductor layer of a first nitride-based compound semiconductor with a smaller bandgap includes an opening, on which a gate insulating layer is formed at a portion exposed through the opening. A first source electrode and a first drain electrode formed across a first gate electrode make an ohmic contact to the second semiconductor layer. A second source electrode and a second drain electrode formed across a second gate electrode that makes a Schottky contact to the second semiconductor layer make an ohmic contact to the second semiconductor layer.

ED inverter circuit and integrate circuit element including the same

The field effect transistor includes a laminated structure in which a buffer layer, and an electron transporting layer (undoped GaN layer), and an electron supplying layer (undoped AlGaN layer) are laminated in sequence on a sapphire substrate. An npn laminated structure is formed on a source region of the electron supplying layer, and a source electrode is formed on the npn laminated structure. A drain electrode is formed in a drain region of the electron supplying layer, and an insulating film is formed in an opening region formed in the gate region. When a forward voltage greater than a threshold is applied to the gate electrode, an inversion layer is formed and the drain current flows. By changing a thickness and an impurity concentration of the p-type GaN layer, the threshold voltage can be controlled. The electrical field concentration between the gate electrode and the drain electrode is relaxed due to the drift layer, and voltage resistance improves.

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Tokyo, Japan

Hiroshi Kambayashi