Matsushita Electric Industrial Co., Ltd.

Hiroshi Horikane

Tatsuro Juri

Masakazu Nishino

Iwao Hidaka

Shinya Kadono Kadono

Masato Izawa

A digital recording and playback unit which prevents deterioration of reproduced video image due to confusion in servo control occurring at a chronologically discontinued portion in the recording at the time of playback when a wide head is used for reproducing assembled video data recorded in a narrow track width. The digital recording and playback unit include a decoding circuit for decoding the reproducing signal to digital playback data, an error correction circuit for restoring erroneous portions of the data decoded by the decoding circuit, a first frame memory used for making corrections by the error correction circuit, a deshuffling circuit for reassembling data restored by the error correction circuit, a second frame memory used for deshuffling by the deshuffling circuit, a detecting circuit for detecting a chronologically discontinued portion in the recording at the time of playback, and a control circuit for instructing writing and reading to and from the first and second frame memories based on the output of the detecting circuit. Helical scanning is employed and one frame of the video image consisting of multiple tracks is recorded in a track width of 2 W/3, where W is the width of a recording and playback head.

Digital recording and playback unit with an error correction device

In an apparatus for executing an algorithm for realizing an orthogonal transform operation such as the 8 points fast cosine transform, by operating on successive sets of data values of a digital signal such as a digital video signal in such applications as high efficiency coding of a digital video signal, a plurality of multiplication operations that are executed during processing of each set of data values are executed sequentially by time division multiplex operation of a single multiplier (32) which is capable of executing a multiplication operation within one sample period of the digital signal, with input and output data values being transferred by selector units (11, 33, 41) between the multiplier and other sections of the apparatus at appropriate times during processing of each set of the input digital signal values. The scale of hardware required for the apparatus is thereby reduced by comparison with an apparatus which employs a plurality of separate multipliers.

Orthogonal transform apparatus for video signal processing

Disclosed is an orthogonal transformation encoder in which after horizontal orthogonal transformation is performed, in parallel to the horizontal and vertical rearrangement of the coefficients for performing vertical orthogonal transformation, detection of interfield coefficient is performed and intra-frame/intrafield modes for the vertical orthogonal transformation are switched. Further, in parallel to the rearrangement of the transformation coefficients for the vertical orthogonal transformation to be in the ascending order from a lower frequency component to a higher frequency component, the amplitude values of the AC components in the block in question are detected to thereby make control on the basis of the amplitude values so that the smaller the amplitude value of the block the smaller the quantizing step width.

Growing community of inventors

Kadoma, Japan

Hiroshi Horikane