Mitsubishi Denki Kabushiki Kaisha

Renesas Electronics Corporation

Renesas Technology Corp.

Matsushita Electric Industrial Co., Ltd.

Shinkawa Ltd.

Hiroshi Horibe

Takayuki Saito

Kazuko Nakamura

Yasuki Takata

Shinji Toyosaki

Shiko Shin

Hideyuki Arakawa

Kaori Sumitomo

Masazumi Matsuura

Kazunari Michii

Tomonori Nakamura

Susumu Matsumoto

Tsuyoshi Hamatani

Yoshihito Hagiwara

Namiki Moriga

Yasuhito Suzuki

Fumiaki Aga

Akira Takaki

The mounting apparatus includes: a bonding headthat bonds, while pressing, a semiconductor chiponto a substrateor another semiconductor chip; and a heating mechanismthat heats the semiconductor chipfrom the side during the execution of this bonding. After two or more semiconductor chipsare stacked while being bonded by temporary pressure-bonding, the bonding headheats and applies pressure to an upper surface of the resultant stacked body, thereby integrally pressure-bonding the two or more semiconductor chips, and at the time of this pressure-bonding the heating mechanismheats the stacked body from the side.

Semiconductor chip mounting apparatus and semiconductor chip mounting method

Technique capable of achieving reliability improvement of a semiconductor device even if temperature rising of an operation guarantee temperature of the semiconductor device is performed is provided. Gap portions are provided among a plurality of pads, and a glass coat composed of, for example, a silicon oxide film or a silicon nitride film is embedded in the gap portions. The glass coat is provided in order to secure electrical insulation among the pads, and coats outer edge portions of the pads. Trenches are formed so as to be adjacent to regions, which are coated with the glass coat, of the outer edge portions of the pads.

Semiconductor device

There is provided a technology capable of suppressing the damage applied to a pad. When the divergence angle of an inner chamfer part is smaller than 90 degrees, the ultrasonic conversion load in a direction perpendicular to the surface of the pad is very small in magnitude. In other words, the ultrasonic conversion load in a direction perpendicular to the surface of the pad is sufficiently smaller in magnitude than the ultrasonic conversion load in a direction in parallel with the surface of the pad. Consequently, when the divergence angle of the inner chamfer part is smaller than 90 degrees, the ultrasonic conversion load in a direction perpendicular to the surface of the pad can be sufficiently reduced in magnitude, which can prevent pad peeling.

Semiconductor device and a manufacturing method thereof

Height control of a capillary is performed in a stitch bonding (2nd bond) in a wire bonding, so that a thickness of a stitch portion can be controlled, thereby ensuring a bonding strength at the stitch portion and achieving an improvement in a bonding reliability. Also, the stitch portion has a thick portion, and a wire and a part (&#x3b1; portion) of a bonding region of an inner lead is formed to a lower portion of the thick portion, thereby sufficiently ensuring a thickness of the stitch portion and a bonding region.

Method of manufacturing semiconductor device and semiconductor device

A semiconductor device includes: multiple kinds of interlayer insulating films formed on a semiconductor substrate and having different elastic moduli, respectively; a metal pad arranged on said multiple kinds of interlayer insulating films; the interlayer insulating film of a low elastic modulus having the lowest elastic modulus and having an opening located under the metal pad, the interlayer insulating film of a not-low elastic modulus having the elastic modulus larger than the elastic modulus of the interlayer insulating film of the low elastic modulus, being layered in contact with the interlayer insulating film of the low elastic modulus, and continuously extending over the opening and a region surrounding the opening and a metal interconnection layer arranged under the metal pad, filling the opening in the interlayer insulating film of the low elastic modulus, and being in contact with the interlayer insulating film of the not-low elastic modulus.

Semiconductor device which employs an interlayer insulating film of a low mechanical strength and a highly reliable metal pad, and a method of manufacturing the same

In order to provide a downsized semiconductor device increased in function level with output terminals arranged along at least three sides of a semiconductor chip, the semiconductor device includes a semiconductor chip having a row of aggregated pads arranged on a main surface, and a row of output terminals arranged along at least three sides at a perimeter of the semiconductor chip, wire-bonded with the row of aggregated pads.

A semiconductor device comprises a chip; a plurality of bonding pads provided on the chip; and a plurality of inner leads arranged opposite to the bonding pads. Further the semiconductor device comprises a plurality of bonding wires electrically connecting the bonding pads and the corresponding inner leads, respectively. Each of the bonding wires has a plurality of bends electrically isolated from conductive parts on the chip, and the bonding pads are arranged at optional positions on a surface of the chip. Hence the shorting of the chip by the bonding wires can be reliably prevented, the bonding wire having a high mechanical strength can be stably fed, the bonding pads may be optionally arranged on the chip, the degree of freedom of designing the layout of the internal circuit of the chip is high, and the semiconductor device and the wire bonding apparatus can be developed at a high efficiency.

Semiconductor device and wire bonding apparatus

A semiconductor device comprises a semiconductor chip. The semiconductor chip has an internal active region, an external active region, and a plurality of electrodes for electrically connecting the internal active region and the external active region to outside thereof, respectively. The semiconductor device also comprises a boarding portion that carries the semiconductor chip, a plurality of external electrode terminals for electrical connection to an external device, a plurality of connecting wires each connecting the electrode of the semiconductor chip and the external electrode terminal; and a mold resin that seals the semiconductor chip, the boarding portion and the connecting wires. The electrodes are disposed around the internal active region, and the external active region is disposed outside the electrodes.

A semiconductor package includes a semiconductor chip, a die pad, an adhesive, metal wires, LOC inner leads, and standard inner leads sealed within a sealing resin. The LOC inner leads and the standard inner leads are arranged in the same plane and both are arranged along one side of the semiconductor chip. Clearance between the inner leads and the die pad larger than the total thickness of the semiconductor chip and the bonding material. Thus, a semiconductor chip having electrode pads broadly distributed can be employed and the section modulus of the semiconductor package can be increased.

Semiconductor package

A wire bonding method for joining a metal wire with a bonding pad disposed on a semiconductor element by using a load and supersonic wave vibration, comprising: during interval of time from contact of the metal wire with the bonding pad to application of the supersonic wave vibration, continuously applying a first bonding load and a second bonding load which is lower than the first bonding load; and after application of the supersonic wave vibration, continuously applying a third bonding load of a size of about 50% of the load of the second bonding load and a fourth bonding load which is lower than the first bonding load and higher than the third bonding load. The reliability of the fine wire bonding joint is improved remarkably, whereby a high quality semiconductor device cna be produced at a low cost.

Wire bonding apparatus

A wire bonding method for joining a metal wire with a bonding pad disposed on a semiconductor element by using a load and supersonic wave vibration, comprising: during interval of time from contact of the metal wire with the bonding pad to application of the supersonic wave vibration, continuously applying a first bonding load and a second bonding load which is lower than the first bonding load; and after application of the supersonic wave vibration, continuously applying a third bonding load of a size of about 50% of the load of the second bonding load and a fourth bonding load which is lower than the first bonding load and higher than the third bonding load. The reliability of the fine wire bonding joint is improved remarkably, whereby a high quality semiconductor device can be produced at a low cost.

Growing community of inventors

Kanagawa, Japan

Hiroshi Horibe