Panasonic Intellectual Property Management Co., Ltd.

Matsushita Electric Industrial Co., Ltd.

Nuvoton Technology Corporation Japan

Panasonic Semiconductor Solutions Co., Ltd.

Hiroshi Fujinaka

Yutaka Abe

Masahiro Higuchi

Kazuko Nishimura

Norihiko Sumitani

Makoto Ikuma

Takayasu Kito

Yuusuke Yamaoka

Toru Sakuragawa

Kenichi Origasa

Ichiro Kameyama

Hiroyuki Amikawa

Dai Ichiryu

Yosuke Higashi

Hideki Shirokoshi

Kazushi Nishida

Katsuya Fujii

Naoki Kawamoto

A solid-state imaging device includes: a plurality of pixel circuits arranged in rows and columns; a plurality of selector circuits that each receive, as inputs, two pixel signals corresponding to two columns different from each other; k column AD conversion circuits that perform AD conversion on pixel signals output from the plurality of selector circuits, k being an integer greater than or equal to two; and m column AD conversion circuits that are provided redundantly. In the solid-state imaging device, the plurality of selector circuits selectively exclude, from among the k column AD conversion circuits and the m column AD conversion circuits, m column AD conversion circuits corresponding to m columns adjacent to each other, and associate k pixel signals output from the plurality of pixel circuits with k column AD conversion circuits which have not been excluded.

Solid-state imaging device with redundant ad conversion circuits and selective exclusion

A solid-state imaging device includes: a plurality of pixel cells arranged in a matrix. In the solid-state imaging device, each of the plurality of pixel cells includes: a photoelectric converter that generates charge by photoelectric conversion, and holds a potential according to an amount of the charge generated; an initializer that initializes the potential of the photoelectric converter; a comparison section that compares the potential of the photoelectric converter and a predetermined reference signal, and causes the initializer to perform initialization when the potential of the photoelectric converter and the predetermined reference signal match; and a counter that counts a total number of times of initialization performed by the initializer, and outputs a signal corresponding to the total number of times as a first signal indicating an intensity of incident light.

Solid-state imaging device

A solid-state imaging device includes a first A/D converter circuit and a second A/D converter circuit per column. The first A/D converter circuit performs a first A/D conversion that (i) refines, using a first comparator, a range including a potential of an analog signal through a binary search, and (ii) generates, based on a result of the binary search, a first digital signal being a high-order portion of the digital signal. The second A/D converter circuit performs a second A/D conversion that generates a second digital signal being a low-order portion that is a remainder of the digital signal by measuring a time required for an output of the second comparator to be inverted, the second comparator comparing a quantitative relationship between the analog signal refined and a ramp signal.

Solid-state imaging device, and camera system using same

A solid-state imaging device includes an A/D converter per column. The A/D converter performs a first A/D conversion that (i) refines, using a first comparator, a range including a potential of an analog signal to a range of a potential corresponding to a difference between a first potential and a second potential through a binary search, and further (ii) generates, based on a result of the binary search, a first digital signal being a high-order portion of a digital signal. The A/D converter also performs a second A/D conversion that generates, based on a ramp signal and the result of the binary search, a second digital signal being a low-order portion of a remainder of the digital signal, by measuring a time necessary for an output of a second comparator to be inverted.

A solid-state imaging device includes: a plurality of unit cells each including at least one light receiving unit and an amplifying transistor which outputs an amplified signal corresponding to an amount of the signal charge photoelectrically converted by the light receiving unit; a plurality of vertical signal lines each for receiving an output signal from the amplifying transistor; a pixel power supply line for supplying a power supply voltage to the amplifying transistor; a plurality of constant current source transistors each connected to a different one of the vertical signal lines; and a bias circuit which controls an amount of current to be supplied to each of the constant current source transistors, based on a variation in the power supply voltage.

Solid-state imaging device and imaging apparatus

A ramp generator circuit includes: a reference signal generator circuit which generates a ramp waveform having a slope obtained by multiplication using a power of 2 according to a value of a higher order bit of a gain control signal; a clock control circuit which selectively outputs 2^m kinds of fractional-N clocks according to one of 2^m (natural number) areas obtained by dividing a code range represented by a lower order bit, when a negative gain is set; and a variable gain circuit which sets a ramp waveform according to the value of the gain control signal, and sets a ramp signal amplitude in each area so that a period ratio between ramp driving clocks for adjacent areas and a ratio between an amplitude of a ramp signal when the standard gain is set and a largest amplitude of a ramp signal are equal.

Ramp generator circuit and solid-state imaging device

A solid-state imaging device includes the following. Pixels arranged in matrix converts received light into signal voltage. A column AD conversion unit, which includes a comparison unit and an up-down counting unit, converts signal voltage to digital signal. The comparison unit compares a value of signal voltage to a gradually changing value of reference signal voltage. The up-down counting unit counts, by one of down-counting and up-counting, a time period until the comparison result is reversed if the signal voltage is of a base signal component of each pixel at reset level, and counts, by an other of down-counting and up-counting, the time period if the signal voltage is of a superimposed signal component in which the base signal component is superimposed on a pixel signal component corresponding to an amount of light received by the pixel. The comparison unit has switchable kinds of frequency band characteristics.

Solid-state imaging device having a counting unit and a comparison unit with switchable frequency band characteristics and imaging apparatus having the same

A voltage generation circuit includes a control circuit which outputs a first digital signal, a DAC which outputs a first analog signal corresponding to the first digital signal, and an attenuator which is connected to an output terminal of the DAC and is configured to output a voltage signal obtained by attenuating the first analog signal input from the DAC.

Voltage generation circuit, analog-to-digital conversion circuit, solid-state imaging device, and imaging apparatus, which are capable of reducing random noise

The ramp-signal generator circuit includes a reference voltage generator that changes the voltage of a reference signal Vr to a comparator setting voltage VR for compensating for a voltage difference between a reference signal Vr and an analog input signal (Vs-Vsn) before comparison by an analog-to-digital converter circuit and outputs a ramp signal whose slope starts from the comparator setting voltage VR in response to a start of the comparison. The ramp-signal generator circuit is configured to add a predetermined enhanced voltage VA to the comparator setting voltage VR before the comparison.

Ramp-signal generator circuit, and image sensor and imaging system including the same

A stepping motor driving apparatus includes a detector that detects a current supplied to a winding included in the stepping motor, a first offset adding section that adds an offset to the output of the detector, an amplifier that amplifies the output of the first offset adding section, a reference signal generator that generates a reference signal indicating a current limit, a second offset adding section that adds an offset to the output of the reference signal generator, a switching section that supplies a power to the winding when the switching section is turned on and cuts off a power to the winding when the switching section is turned off, and a PWM controller that turns on the switching section every predetermined period, and turns off the switching section when the output of the amplifier exceeds the output of the second offset adding section.

Stepping motor driving apparatus and stepping motor driving method

A switching power supply circuit attaining high power conversion efficiency and a low operation start lower-limit voltage is provided. The switching power supply circuit in accordance with the present invention comprises an input terminal to which an input voltage is input; an output terminal from which an output voltage is output; a choke coil and a rectifying device, connected in series between the input terminal and the output terminal, to which the input voltage is input and from which the output voltage is output; a voltage step-up switching device, one terminal of which is connected between the choke coil and the rectifying device and another terminal of which is connected to the grounding point of the circuit; a power supply control circuit, to which the output voltage is input as a drive power supply, for controlling the voltage step-up switching device and the rectifying device; a transistor connected between the input terminal and the output terminal in parallel with the series connection of the choke coil and the rectifying device; and a differential amplifier, to which a first voltage derived from the input voltage and a second voltage derived from the output voltage are input, for turning ON the transistor when the first voltage is higher than the second voltage and for turning OFF the transistor when the first voltage is lower than the second voltage.

Switching power supply circuit

An antenna duplexer capable of optimally decreasing the insertion loss and the voltage standing wave ratio (VSWR) at a center frequency and its vicinity in the pass band in transmitter-band of the device. The output port of transmitter surface-acoustic-wave (SAW) filter ( ) is electrically connected with phase shift circuit ( ), to which receiver SAW filter ( ) is also electrically connected. The transmitter and receiver SAW filters have different pass bands and attenuate the other pass band with each other. Phase shift circuit ( ) shifts the phase of receiver SAW filter ( ) in the transmitter-band. In addition, phase shift circuit ( ) has the characteristic impedance in which the magnitude of the reflection coefficient at the center frequency in the transmitter-band of receiver SAW filter ( ) is to be not less than 0.8 and the phase angle of reflection coefficient at the center frequency in the transmitter-band of receiver SAW filter ( ) takes the range from 0&deg; to 45&deg;.

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Osaka, Japan

Hiroshi Fujinaka