Kabushiki Kaisha Toshiba

Other

Yazaki Corporation

Foundation for Advancement of International Science

Tadahiro Ohmi

Foundation Fõr Advancement of Internati{dot Over (o)}nal Science

Hiroshi Akahori

Wakako Takeuchi

Akinobu Teramoto

Akihito Yamamoto

Yuuichi Mikata

Atsuhiro Sato

Keiichi Nii

Shigehiko Saida

Shuji Katsui

Shigetoshi Sugawa

Yoshio Ozawa

Takashi Nakao

Takashi Suzuki

Susumu Hiyama

Takanori Watanabe

Yoshio Kasai

Takanori Tsuda

Masayuki Tanaka

Ichiro Mizushima

Yoshitaka Tsunashima

Nobutoshi Aoki

Masaki Kondo

Yukihiro Ushiku

Ken Ishii

Shuichi Samata

Kiyohito Nishihara

Shigeo Kondo

Murato Kawai

Takashi Ichikawa

Hidenobu Nagashima

Kazuaki Iwasawa

Nobuhito Kuge

Masaki Kamimura

Yingkang Zhang

Nobuhito Kawada

In accordance with an embodiment, a manufacturing method of a semiconductor device includes: forming memory cells and select transistors on a semiconductor substrate configured to select any memory cell, forming a first insulating nitride film, forming a contact, and selectively removing the first insulating nitride film. The first insulating nitride film is formed so as to cover the semiconductor substrate between the select transistors adjacent in the first direction, the select transistors, and the memory cells. The first insulating nitride film is selectively removed in a region other than the region in which the contact is formed and in a region above the select transistors or the memory cells.

Manufacturing method of semiconductor memory device

A cause of deteriorating the hydrogen termination on the surface of a wafer is found to be water adsorbed on the surface. By exposing the wafer to an inert gas atmosphere containing an Hgas so as to suppress the oxidation reaction due to the water, it is possible to improve the hydrogen termination on the wafer surface.

Method of manufacturing semiconductor device and semiconductor manufacturing apparatus

According to one embodiment, a nonvolatile memory device includes a substrate, first and second tunnel insulating films, first and second floating gate electrodes, an intergate insulating film and a control gate electrode. The substrate has first and second active regions isolated from each other by an element isolation trench. The first and second tunnel insulating films are located in the first and second active regions, respectively. The first and second floating gate electrodes are located on the first and second tunnel insulating films, respectively. The intergate insulating film includes a first insulating layer of a first insulating material, an electron trap layer of a second insulating material on the first insulating layer, and a second insulating layer of the first insulating material on the electron trap layer. The control gate electrode is located on the intergate insulating film.

Nonvolatile memory device

A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si&#x2014;N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.

Nonvolatile semiconductor memory and method of manufacturing the same

A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.

Nonvolatile semiconductor memory device and manufacturing method thereof

In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated HO or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.

Semiconductor device and method of manufacturing the same

A semiconductor device includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film comprising a plurality of insulating films provided on the charge storage layer and comprising a nitride film as an uppermost layer, and a single-layer control gate electrode provided on the second insulating film and comprising metal silicide.

Semiconductor device and method for manufacturing the same

By hydrogen-terminating a semiconductor surface using a solution containing HFions and an oxidant, the hydrogen termination can be quickly carried out. In this case, the semiconductor surface is silicon having a (111) surface, a (110) surface, or a (551) surface.

Semiconductor device manufacturing method and semiconductor manufacturing apparatus

A semiconductor device according to an embodiment of the present invention has a bit line and a word line. The device includes a substrate which is provided with first trenches extending in a bit-line direction and has side surfaces forming sidewalls of the first trenches, the substrate being provided with bird's beaks at upper edges of the side surfaces, a first gate insulator formed on the substrate between the first trenches, a floating gate formed on the first gate insulator between the first trenches and located between second trenches extending in a word-line direction, the floating gate not being provided with bird's beaks at lower edges of side surfaces facing the first trenches, a second gate insulator formed on the floating gate between the second trenches, and a control gate formed on the second gate insulator between the second trenches.

In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe.

P-channel power MIS field effect transistor and switching circuit

A nonvolatile semiconductor memory device having high charge retention characteristics and capable of improving leakage characteristics of a dielectric film disposed between a charge storage layer and a control gate electrode, and manufacturing method thereof is disclosed. According to one aspect, there is provided a semiconductor memory device comprising a first electrode disposed on a first insulator on a semiconductor substrate, a second insulator disposed on the first electrode, a second electrode disposed on the second insulator, and diffusion layers disposed in the semiconductor substrate, wherein the second insulator including a silicon-rich silicon nitride film containing more silicon than that in a stoichiometric silicon nitride film, and a silicon oxide film formed on the silicon-rich silicon nitride film, and wherein the silicon-rich silicon nitride film has a ratio of a silicon concentration and a nitrogen concentration set to 1:0.9 to 1:1.2.

Semiconductor memory device and manufacturing method thereof

Growing community of inventors

Yokohama, Japan

Hiroshi Akahori