Hitachi, Ltd.

Hironori Inoue

Shuhei Matsumoto

Shintaro Wada

Makiko Shinohara

Kenichiro Yamato

In a computer system according to the background art, when a request to halt a virtual processor was detected, the virtual processor was blocked. In the blocking method, latency of virtual halt exit of the virtual processor was so long that a problem of performance was caused. A virtual machine monitor selects either of a busy wait method for making repeatedly examination until the virtual halt state exits while the virtual processor stays on the physical processor and a blocking method for stopping execution of the virtual processor and scheduling other virtual processors on the physical processor while yielding the operating physical processor and checking off scheduling of the virtual processor to the physical processor, based on a virtual processor halt duration predicted value of the virtual processor which is an average value of latest N virtual processor halt durations of the virtual processor.

Computer system

Computer including a plurality of physical CPUs, a plurality of virtual computers which execute predetermined processing and to which one of the plurality of physical CPUs is assigned, and a virtual computer control component able to cause the plurality of physical CPUs to execute overhead processing required by plurality of virtual computers. Virtual computer control component configured to: (A) upon causing the physical CPU, in which processing of the virtual computer is in a running state, to execute overhead processing, measure a run time used by the physical CPU to manage a cumulative run time, for each of the physical CPUs; and (B) upon causing the overhead processing to be executed subsequent to the (A), select a physical CPU in which the cumulative run time is smallest as the physical CPU to execute the overhead processing.

Computer, virtualization mechanism, and scheduling method

The method of calculating the processor utilization for each of logical processors in a computer, including the steps of: dividing the computation interval in which the processor utilization by each logical processor is to be calculated into a single task mode (ST) execution interval and a multitask mode (MT) execution interval, appropriately calculating them based on the before-and-after relation between two times; and adding the MT execution interval multiplied by a predetermined MT mode processor resource assignment ratio to the ST mode execution interval to obtain the processor utilization for the calculation-targeted logical processor in the computation interval.

Method of calculating processor utilization rate in SMT processor

A hypervisor calculates the total number of processor cycles (the number of processor cycles of one or more physical processors) in a first length of time based on the sum of the operating frequencies of the respective physical processors and the first length of time for each first length of time (for example, a scheduling initialization cycle T, which will be explained further below). The hypervisor calculates for each virtual computer the number of possessing cycles, which is a value obtained by the total number of processor cycles being distributed in proportion to the service ratios of multiple virtual computers. In virtual processor scheduling, the hypervisor runs a virtual processor inside a virtual computer on any physical processor based on the number of hold cycles of each virtual computer.

Computer system and method of scheduling a virtual processor to run on physical processors based on the number of possessing cycles of each virtual computer

When the number of logical CPUs increases as the number of LPARs increases, a physical CPU amount which a hypervisor uses will increase and thus the physical CPU resource cannot be effectively utilized. Grouping of LPARs and physical CPUs is performed and a logical CPU to which a physical CPU is allocated is selected from logical CPUs of an LPAR within a group.

Virtual computer and CPU allocation method

Computer system, virtual machine monitor and scheduling method for virtual machine monitor

Attempts are made to reduce the system overhead generated at the time of context save/restore processing to perform process switching in a virtual machine system. In a CPU occupancy mode that a physical CPU is exclusively allocated to virtual machines, a logical CPU process running on the physical CPU is static, so that it is not necessary to save/restore the context every time the processes are switched. When a switching source process is a logical CPU process in a CPU occupancy mode, a context save is temporarily suspended. When switching to the same logical CPU process is made again continuously, save/restore is skipped. When the logical CPU process of a VMM control VM runs in that period, the logical CPU process whose save is delayed is recorded and saved late.

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Ebina, Japan

Hironori Inoue