Sony Corporation

Nippon Hoso' Kyokai

The University of Tokyo

Hitachi Electronics, Ltd.

Sony Group Corporation

Hironobu Katayama

Yoshinori Muramatsu

Tomohiro Yamazaki

Shuji Uehara

Yoshihiro Watanabe

Masatoshi Ishikawa

Katsuya Yokoyama

Shozo Nakagawa

Makoto Yamamoto

An image processor according to the present disclosure includes: a multiplier that receives image data from a pixel section including pixels of a plurality of colors and multiplies the image data by an adjustment parameter that adjusts a color level in each of the pixels; an adjuster that calculates a ratio of respective colors in each of the pixels in the image data and adjusts a value of the adjustment parameter on the basis of the ratio of the respective colors; and a binarization processor that extracts a target image of a specific color on the basis of the image data multiplied by the adjustment parameter.

Image processor, imaging device, and image processing system

The present disclosure relates to an arithmetic device that reduces a scale of an arithmetic processing unit which performs an arithmetic process between frames in a sensor. A frame memory stores pixel data of a frame that transitions in time sequence. An inter-frame arithmetic processing unit implements a predetermined arithmetic by column parallel in a row unit on the pixel data of a current frame and the pixel data of a past frame stored in the frame memory and updates the pixel data of the past frame stored in the frame memory on the basis of a result of the predetermined arithmetic.

Arithmetic device and sensor to track movement of object between frames

To perform inter-pixel image processing with lower latency and higher speed. An image sensor includes: a pixel array unit in which pixels having a photoelectric conversion function are arranged in an array; an AD conversion unit configured to perform AD conversion processing on pixel signals output from the pixels in parallel for each column of the pixels of the pixel array unit; a memory unit configured to hold pixel signals of any number of rows subjected to AD conversion in the AD conversion unit for each column of the pixels; an inter-pixel image processing unit configured to read pixel signals of any rows and columns from the memory unit, and perform computing between the pixel signals in parallel for each column of the pixels; and an output circuit configured to control output, to an outside, of pixel signals output from the AD conversion unit and pixel signals output from the inter-pixel image processing unit. The present technology can be applied to, for example, a CMOS image sensor.

Image sensor and driving method, and electronic apparatus

In a helical-scan magnetic record/playback system, n magnetic heads (where n is an integer greater than one) are disposed close to the outer wall of a head drum, spaced from one another by 2.pi./n radians with respect to the rotational axis of the head drum and also spaced from one another by approximately 1/n of the width of a magnetic tape in the axial direction of the head drum. The magnetic tape is wound around the head drum over an angle of 2.pi./n radians or more with respect to the rotational axis of the drum. With the rotation of the head drum, a video signal is time-sequentially divided for recording on n tracks of the tape and for reproduction therefrom. The invention results in reduced friction between the tape and the drum, thereby providing smooth travel and easy loading of the tape. According to this invention, a still or slow-motion picture can be reproduced without an external memory and the reciprocal travel of the tape.

PCM helical-scan magnetic record/playback systems

In a digital magnetic recording and reproducing apparatus, a digital code signal to be recorded is given a code conversion by means of modulo-2-adding another digital signal thereto to prevent a continuation of the same binary signal levels for a prolonged period. The signal level of the reproduced digital code signal is corrected by level comparison with a threshold level provided by applying the above reproduced digital code signal to a compensator and peak rectifiers, which have the same time-constant, and then the reproduced digital code signal is given another code conversion by means of modulo-2-adding still another digital signal provided for restoring the code conversion, so that it is possible to reproduce the original digital code signal faithfully.

Digital magnetic recording and reproducing apparatus

A hybrid servo control system for controlling, for example a rotation of a capstan driving motor or a head motor of a video tape recorder comprises at least an integral control loop including an analog phase comparator for detecting in an analog mode a phase difference between a signal related to the rotation of the capstan driving motor or the head motor to be controlled and a reference signal so as to produce an analog amount corresponding to said phase difference, an analog-digital converter for converting said analog amount into a digital amount and a digital frequency modulator for frequency modulating in a digital mode clock pulses with said digital amount.

Growing community of inventors

Kanagawa, Japan

Hironobu Katayama