Nippon Telegraph and Telephone Corporation

Hitachi, Ltd.

Nec Corporation

Fujitsu Corporation

At+t Corp.

Nec Communication Systems, Ltd.

Nec Communications Systems, Ltd.

Hiromi Ueda

Yoshihiro Ashi

Yukio Nakano

Masahiro Takatori

Takumi Nomura

Hiroyuki Kasai

Tadayuki Kanno

Toshinori Tsuboi

Motoo Nishihara

Takatoshi Kurano

Kunitetsu Makino

Haruhiko Matsunaga

Hirokazu Kobayashi

Hiroyuki Endo

Shigeo Amemiya

Ryuichi Ikematsu

Hiroaki Kurokawa

Hitoshi Uematsu

Kenji Akutsu

Takao Ogura

Takashi Mori

Yasuki Fujii

Takafumi Chujo

Haruo Yamashita

Kazuo Iguchi

Koji Tezuka

Mark A Pashan

Yuichi Matsuda

Gary D Martin

Akihiro Miyamoto

Shahrukh S Merchant

Ikuo Tokizawa

Toshihiko Fujita

Takashi Kuriyama

Mutsumi Sato

Keiichi Ishida

The present invention is to provide an optical access network in which a remote unit receives an optical burst signal. A central unit (OLT) transmits a DC-balanced optical continuous signal including packets having identification information for identifying each remote unit (ONU) to an optical switching module (OSM). The optical switching module (OSM) receives the DC-balanced optical continuous signal from the central unit (OLT), optically switches the packets based on the identification information, and transmits a DC-balanced optical burst signal including the packets to the remote unit (ONU). The remote unit (ONU) receives the DC-balanced optical burst signal and acquires the packets transmitted to the remote unit (ONU).

Optical access network, remote unit, optical communication method, and optical communication program

In an optical access network using an optical switching device, a 2&#xd7;1 optical splitter in the uplink and downlink directions is eliminated to extend the transmission distance between the OLT and the ONU. An optical switching device includes a downlink optical switch element for switching a downlink optical signal sent by an OLT, an uplink optical switch element for switching an uplink optical signal sent by a plurality of ONU, an O/E for converting a downlink optical signal to a first electrical signal, an E/O for converting the first electrical signal to a downlink optical signal and inputting the downlink optical signal to the downlink optical element, an O/E for converting an uplink optical signal output from the uplink optical switch element to a second electrical signal, and an E/O for converting the second electrical signal to an uplink optical signal and sending the uplink optical signal to the OLT.

Optical switching device, optical access network, optical switching method, program, and recording medium

To provide synchronizing methods, optical switch modules, center devices, remote devices, optical access systems, optical access networks, programs, and recording media in the optical access network which can give the connection start time of the upstream optical switching element of the optical switch module. To the optical switch module, ranging functions are provided and the center device OLU carries out ranging of the optical switch module OSM as is the case of ranging of the remote device ONU. The center device OLU transmits the difference between roundtrip time of the remote device ONU and roundtrip time of optical switch module OSM, which is the result of these rangings, to the optical switch module OSM, and the optical switch module OSM can obtain the contact start time of the upstream optical switching element by calculating the contact start time using the difference.

Synchronizing method in optical access network, optical switching device, center device, and remote device

An optical access network method, an optical access network and an optical switch for an optical access network, capable of solving all the three problems in the conventional GE-PON: transmission distance problem, security problem and communication interference problem. The optical access network comprises an OLT, a plurality of ONUs and one or more stages of optical switches, which are connected one another. In the direction from the OLT to the ONU, each frame (packet) transmitted from the OLT to one of the ONUs is checked so that only the destination ONU specified in the frame (packet) is connected to the OLT. In the direction from the ONU to the OLT, a control message transmitted from the OLT to one of the ONUs is checked so that only one ONU which has been given a transmission allowance from the OLT is connected to the OLT with respect to each frame (packet).

Optical access network method, optical access network, and optical switch for optical access network

An alarm masking system is provided which is capable of implementing alarm priority processing or alarm inhibit processing in ATM transmission equipment. In ATM transmission equipment, a received virtual path or virtual channel is switched by means of a switching unit and then sent to an interface unit. In doing this, if a higher priority alarm is detected or received at a reception side interface unit, an intra-office tag is added to the alarm cell and then it is output, so that by detecting this intra-office tag it is possible to inhibit generation of lower priority alarms in response to the higher order alarm.

System for achieving alarm masking processing

A method and apparatus of tracing VP's (virtual paths) wherein operational information of VP connectors are collected through OAM (operation and maintenance) cells. The VP connectors establish a connection at a VP level within a network in which the cells are transferred in an ATM (asynchronous transfer mode). Each VP connector detects an OAM cell for VP tracing as received from another of the VP connectors, and judges if an area for affixing the operational information in the VP connector itself exists in the detected OAM cell. In the VP connector when the area exists, the detected OAM cell is specified to be the OAM cell for writing the operational information thereinto, and the specified OAM cell is sent out after affixing the operational information thereto. When the area does not exit, the OAM cell received from the other VP connector is sent out after indicating therein that the received OAM cell is not the rearmost cell, the OAM cell for the VP tracing is generated anew, and the generated cell is sent out after indicating therein that the generated OAM cell is the rearmost cell. Also the operational information is affixed to newly generated OAM cell.

Virtual path connector and virtual path tracing method and apparatus

In a monitor system in a digital communication apparatus including communication processing blocks on transmission paths of digital data, test data inserting units and data monitor units are arranged such that a monitor interval for the monitor operation in a block overlaps with a monitor period for the monitor operation between adjacent blocks in each processing block. As a result, there is no unmonitored interval in each processing block, thereby achieving a complete monitor operation.

Monitor system for digital communication apparatus

In a test method and apparatus for testing a virtual path in an asynchronous transfer mode system, a sequence number is included in an operation administrating monitoring (OAM) cell to specify the OAM cell for testing a virtual path between transmission and reception sides. The sequence number is inserted into the OAM cell by the use of an idle cell and is received by a sequence number test circuit included in the reception side. The sequence number in the OAM is collated with a result of counting the OAM cell in the reception side to detect coincidence or non-coincidence between the sequence number and the result of counting. On detecting the non-coincidence, a loss of the OAM cell or wrong reception of the OAM cell is detected on the reception side. Otherwise normal operation is confirmed between the transmission and the reception sides.

Test method and apparatus capable of testing reception of a desired cell

In a cross-connect apparatus for use in selectively connecting a plurality of input transmission paths to a plurality of output transmission paths, each of the input and the output transmission paths is divided into first through m-th groups each of which is composed of first through n-th transmission paths, first through m-th elementary switch modules are located between the input and the output transmission paths, n in number, of the first through the m-th groups and are connected to a connection switch module through first to m-th input internal path groups each of which is composed of n internal paths and which are extended into first through m-th switch units each of which has input terminals, n(m-1) in number, and output terminals, n in number, where n and m are natural numbers. An i-th one of the switch units in the connection switch module is connected to the input path groups, (m-1) in number, except an i-th internal path group, where i is a natural number between unity and m, both inclusive. The output terminals of the i-th switch unit is connected to an i-th one of the elementary switch modules through an i-th one of output internal paths. This structure serves to avoid an unnecessary detour route in the cross-connect apparatus.

Cross-connect apparatus capable of avoiding a superfluous detour route

In a duplicate active-standby memory unit arrangement, a resynchronization initiation determination is made on a cell-interval-by-cell-interval basis based on the equality of cell contents of corresponding queues in the active and standby memory units. If an inequality of the cell contents of the corresponding queues in the active and standby memory units occurs during any cell interval, resynchronization may be initiated. In an exemplary embodiment of the invention, the lengths of data in corresponding queues, i.e., the number of cells stored in the corresponding queues, in the active and standby memory units are compared on a cell-interval-by-cell-interval basis. If the number of cells stored in any of the queues is different than the number of cells its corresponding queue in the other of the memory units during any cell interval, resynchronization of the memory units is initiated. In another embodiment of the invention, the outputs of corresponding queues in the active memory unit and the standby memory unit are compared on a cell-interval-by-cell-interval basis. If the results of the comparison indicates that any one or more of the queue outputs in one of the memory units is different from the output of the corresponding queue in the other memory unit, resynchronization is initiated. Robustness of the latter comparison algorithm is enchanced by restricting the comparisons to cell intervals during which the queue outputs in the active and standby memory units do not both include idle cells. Additionally, robustness of the resynchronization initiation is further enhanced by simultaneously employing both the comparison of cell length in the queues and the comparison of the queue output contents to detect when to initiate resynchronization.

Resynchronization of asynchronous transfer mode (ATM) switch fabric

The requirement of a separate payload clock in an ATM system is eliminated by increasing the number of bytes in an ATM cell and controllably generating and inserting idle cells so that a clock rate equal to that of the incoming SDH, SONET or the like clock rate may be used as a read clock. In one embodiment, the number of cells in a predetermined interval, for example 125 .mu.sec., is adjusted to be a predetermined integer number by inserting idle cells. This, in turn, allows the use of a 'standard' available clock to delineate cell boundaries.

Asynchronous transfer mode (ATM) payload synchronizer

In an ATM switching network, ATM (asynchronous transfer mode) self-routing switches are interconnected by facilities carrying STM-N (synchronous transport modules level N) signals. At each inlet of an ATM self-routing switch, an STM overhead is removed from each frame of an incoming STM-N signal to create a vacant interval and the frame is converted according to ATM cell format into a series of data ATM cells, and an idle ATM cell is derived from the vacant interval. A supervisory bit sequence is inserted to the payload field of the idle ATM cell to produce a supervisory ATM cell, and the data and supervisory ATM cells are sent into the ATM switch. At each outlet of the switch, the bit sequence of the supervisory ATM cell is checked to evaluate the quality of the ATM switch and a series of data ATM cells is then converted into an STM-N signal according to STM-N frame format.

High throughput supervisory system for ATM switching systems

Virtual path operation information of each of the stations of an synchronous transfer mode telecommunications network is traced using OAM cells. OAM cells used for operation and maintenance control of the asynchronous transfer mode telecommunication network have a pointer indicative of the position where virtual path operation information is recorded and an area for storing virtual path operation information of a certain number of stations. Each station records virtual path operation information in an OAM cell, updates the pointer and sends the OAM cell to the next station on a selected path. When the payload of the OAM cell becomes full, the OAM cell records new OAM cell generation request information and the pointer is changed to the final value and is sent to the next station. A station which receives the OAM cell erases the new OAM cell generation request information, transfers the received OAM cell, generates a new OAM cell, initializes the pointer, and transfers the new OAM cell which has its own virtual path operation information to a next station.

Method of tracing virtual path operation information and apparatus

A method and an apparatus for converting a frame phase of a signal having a frame structure specified in the CCITT recommendations which contains N (N: an integer 2 or above) pieces of frames applied with time-division/multiplex, in which the N pieces of frames are given to N pieces of memories, respectively, a write address is given independently to each memory so that the N pieces of frames are written in the respective memories in a same phase as the phase in the signal, a read address is given independently to each memory so that the N pieces of frames are read out of the respective memories in a same phase as the write phase, a difference between a write address and a read address in each memory is set identical under an initial state, and justification is executed for a frame which is read out of the memory in accordance with a difference between existing write address and read address in each memory, whereby to perform frame phase conversion while maintaining relative phase among respective frames.

Method and apparatus for frame phase conversion of signal having frame

Frame aligner and method and system for control thereof

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Yokohama, Japan

Hiromi Ueda