Tokyo Shibaura Denki Kabushiki Kaisha

Kabushiki Kaisha Toshiba

Tokyo Shibaura Electric Co., Ltd.

Hiromi Kusakabe

Yoshitaka Egawa

Yoshihiro Yoshida

Yukio Endo

Nagataka Tanaka

Shinji Ohsawa

Yoriko Tanaka

Hiroyuki Tsurumi

Atsushi Ogawa

Mitsuru Nagata

Masahide Nagumo

Hiroyasu Yamaguchi

Hiroyuki Haga

Osamu Hosohata

Shuichi Kato

In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair. The horizontal select transistors in each pair share one of the source/drain regions so as to be connected to the horizontal signal line in common, and the others of the source/drain regions are connected to the vertical signal line individually.

High-speed solid-state imaging device capable of suppressing image noise

An output voltage of a rectification smoothing circuit is compared with a reference voltage. When a reduction in the output has been detected, an A/D converting circuit converts a result of the comparison which is negatively fed back by an output voltage feedback circuit to obtain a control signal for a bidirectional switch element inserted into a primary side of a transformer so as to turn ON or OFF synchronously or asynchronously with a commercial power supply via an intermittent control circuit.

Energy efficient power supply with light-load detection

A power amplifier comprises a pair of power-supply rails, a power-supply voltage divider, an intermediate power-supply line, a first and second BTL amplifiers, and a first to fourth switching circuits. The power-supply rails are composed of a first power-supply line to which a power-supply potential is applied and a second power-supply line to which the ground potential is applied. The power-supply divider produces an intermediate potential by dividing the voltage between the power-supply rails in two and supplies it to the intermediate power-supply line. The first BTL amplifier is provided between the second power-supply line and the intermediate power-supply line. The second BTL amplifier is provided between the first power-supply line and the intermediate power-supply line. The first and second BTL amplifiers each include an output bridge circuit. At small signal input, the switching circuit connects not only the output bridge circuit of the first BTL amplifier between the intermediate power-supply line and second power-supply line, but also the output bridge circuit of the second BTL amplifier between the first power-supply line and the intermediate power-supply line. At large signal input, the switching circuit connects each of the output bridge circuits of the first and second BTL amplifiers between the power-supply rails.

High-efficiency power amplifier

A circuit constituting a system or a subsystem is composed of a cascade connection of a plurality of analog circuit cells. At least one of said analog circuit cells has either the current-sink input terminal and a current-source output terminal or a current-source input terminal and current-sink output terminal and operates in the current mode.

Custom integrated circuit composed of a combination of analog circuit

A diffusion resistor circuit for reducing distortion caused in a diffusion resistor. The circuit includes the diffusion resistor having a substrate, an island area including an impurity of a first polarity diffused into the substrate and a resistor area including an impurity of a second polarity diffused into the island area, a circuit for supplying a current signal through the resistor area and another circuit connecting the island area to a generally central point of the resistor area for reducing distortion of the current signal.

Diffusion resistor circuit

A thermal shutoff circuit for controlling current to an external circuit in response to changes in the temperature of the shutoff circuit. The thermal shutoff circuit includes a source for supplying a voltage which varies with changes in temperature, and a switch circuit responsive to the temperature variable voltage for interrupting the current to the external circuit when the temperature of the shutoff circuit exceeds a predetermined amount. The switch circuit has a detection transistor having a base connected to the temperature variable voltage source for generating a base current responsive to the temperature variable voltage and a compensation transistor connected in series to the detection transistor for generating an equivalent base current.

Thermal shutoff circuit

A switching circuit apparatus driven by a relatively low DC power supply voltage, which includes a power supply terminal designed to receive a DC power source voltage, a pair of switching circuits comprising switching transistors (28, 30 and 32, 34) connected in parallel with each other and connected to the power supply terminal, first circuit means (10,12) connected for supplying the respective switching circuits with a switched signal, and a second circuit means (16, 18, 40, 14) connected for supplying the respective switching circuits with a pair of control signals which are opposite in phase and which are never both at a potential difference other than a prescribed potential at the same time. The switching circuit transistors (28, 30 or 32, 34) are all fully conductive prior to any transition in which two are rendered non-conductive by the control signals, thereby enable operation of the circuit with low power consumption.

Doubled balanced differential amplifier circuit with low power

A differential amplifier circuit producing sufficient output current with a broad linear working range, which includes first and second transistors coupled at their emitters in differential amplifier configuration, an input circuit means connected between the bases of the first and second transistors, third and fourth transistors connected to the collectors of the first and second transistors constituting collector loads of the first and second transistors respectively, first resistor inserted between the bases of the third and fourth transistors, second and third resistors respectively inserted between the base and collector of each of the third and fourth transistors, and an output circuit means connected to the third and fourth transistors.

Differential amplifier circuit

The amplitude modulation detection device, which is provided with an AM (amplitude modulation) responsive to first and second input signals for maintaining a constant D.C. level output signal, the first signal being the AM signal, and the second signal produced by feedback loop which includes a D.C. voltage comparator connected to the detector for comparing the D.C. output level of the detector with a reference signal level.

Amplitude modulation detector

A differential pair of first and second transistors for voltage comparison is provided, and a bias circuit for setting a reference voltage is connected to the base of the second transistor. A differential pair of third and fourth transistors is provided for reference voltage switching. The third and fourth transistors have their bases connected to the collectors of the first and second transistors and their collectors connected to the bias circuit in a positive feedback relation with respect to the base of the first transistor.

Hysteresis circuit

A frequency modulation detector, includes an FM (frequency modulation) demodulator, an adder responsive to first and second signals for maintaining a constant D.C. level output signal, the first signal being the FM signal, and a feedback circuit connected to the adder for comparing the D.C. output level of the adder with a reference signal level to produce the second signal.

FM demodulator with regulation of the output D.C. component

A current mirror circuit in which error between input current and output current is small and which can operate with low voltage. First and second current mirror transistors of a first conductivity type have their emitters each connected to a power supply, their bases connected together and their collectors connected to an input terminal and an output terminal respectively. A current amplification factor compensating third transistor of the first conductivity type is provided which has its emitter connected to the bases of the first and second transistors and its collector connected to a reference potential point. A fourth transistor of a second conductivity type is provided for level shifting. This transistor has its collector connected to the emitters of the first and second transistors, its emitter connected to the base of the third transistor and its base connected to the collector of the first transistor. A current source is connected between the third transistor and the reference potential point.

Current mirror circuit

This disclosed electric circuit substantially eliminates error output which is caused by unbalanced characteristics of a pair of transistors in a current mirror circuit. An input signal is amplified by a differential amplifier. A current mirror circuit is coupled between said differential amplifier and a power supply. Switching means is coupled to said current mirror circuit for cyclically switching input and output points of said mirror circuit.

Growing community of inventors

Yokohama, Japan

Hiromi Kusakabe