Nec Corporation

Renesas Electronics Corporation

Kabushiki Kaisha Toshiba

Daicel Corporation

Hiromi Honma

Masaki Nakano

Yutaka Kashihara

Masatsugu Ogawa

Shuichi Ohkubo

Toshiaki Iwanaga

Hiroki Takenaka

Yuji Nagai

Akihito Ogawa

Kinji Kayanuma

Masato Shiokawa

Tetsuo Ashizawa

Yasuo Ogasawara

Yuuji Nagai

Masaki Hidano

A method of producing a lens molded article includes a state determination of determining, after molding the lens molded article, whether a state is a first state where the lens molded article molded remains in an upper mold or a second state where the lens molded article molded remains in a lower mold; an adsorption of adsorbing an exposed surface of the lens molded article remaining in the upper mold or the lower mold, by an adsorption device disposed at an arm of a molded article moving device; an adsorption surface change of changing an adsorption surface from a surface adsorbed by the adsorption device to an opposite surface to the exposed surface when the determination result in the state determination is either one of the first state or the second state; and a placement of placing on a tray the lens molded article adsorbed by the adsorption device.

Method of producing lens molded article

The imaging-device lens module includes a lens and a spacer. The lens includes a functioning portion, a non-functioning portion, and a support. The non-functioning portion is disposed around the periphery of, and is integral with, the functioning portion. The support is integral with the non-the functioning portion and supports the lens. The spacer has a flat top face, and the support has a flat bottom face. The spacer is bonded at the top face to the bottom face to support the lens. The top face has a width B, and the bottom face has a width A, where B is greater than A. The support has a height L, the spacer has a height L, and the functioning portion has a diameter D, where the total of Land Lis greater than D, and where the diameter D is equal to or greater than the height L

Lens module for imaging device, and method for producing lens module

A digital loop filter receives a phase error output from a phase comparator to generate a digital frequency value. This digital frequency value is converted into an analog voltage by a D/A converter, and VCO outputs a synchronizing dock of frequency corresponding to the voltage output from the D/A converter. The phase error output from a phase comparator is gain-corrected by a product of an output from the digital loop filter and a specific coefficient 'A', and delivered to digital loop filter. The phase error input to the digital loop filter is changed in proportion to the output clock frequency, whereby the PLL loop as whole linearly controls the loop characteristic depending on the output clock frequency.

PLL circuit and disk drive

A Viterbi detector includes an ACS circuit that performs addition of a path metric and branch metrics, comparison of the path metric values and path selection based on the result of comparison. The ACS circuit performs a path decision based on the path metric values and the reproduced signal supplied to the Viterbi detector at the time instant that is a specified number of channel clocks earlier during the path selection. The ACS circuit selects a mark-continuing path if the reproduced signal at the time instant that is the specified number of channel clocks earlier has an amplitude corresponding to any mark, and performs path decision based on the path metric values if the reproduced signal does not have the amplitude corresponding to any mark.

Viterbi detector and information reproducing apparatus

A digital PLL (phase locked loop) circuit (and method thereof), includes an AAF (anti aliasing filter) that limits a frequency bandwidth of an input RF (radio frequency) signal on the basis of a given cutoff frequency, an ADC (analog to digital converter) that samples an output signal of the AAF on the basis of a given sampling frequency, a down converter that converts a data rate of the ADC, and a digital phase tracking unit that generates a synchronous clock signal from an output signal of the down converter on the basis of a given internal frequency. The cutoff frequency and the sampling frequency are fixed, respectively, even when a frequency bandwidth of the RF signal fluctuates. The down converter reduces the data rate according to an increase in the frequency bandwidth of the RF signal.

Digital PLL circuit, information readout device, disc readout device, and signal processing method

An offset corrector of an information readout apparatus receives a digital signal DRF output from an A/D converter, and performs offset correction. The offset corrector is capable of switching between a level-correction operation that corrects the offset so that the DC level of the shortest period signal included in the readout signal assumes a zero amplitude reference and a HPF operation that matches the level of the readout signal with the zero amplitude reference. The offset corrector corrects the offset in the level correction operation during a normal reproduction, and switches to the HPF operation for offset correction when a defect judgment unit detects a defective area. The information readout apparatus is stable and has a superior performance without a symmetry deviation if there occurs a waveform fluctuation caused by a defect etc.

Information readout apparatus

An information detection device includes an equalizer that equalizes the readout signal to a PR channel having equalization target levels of four or more values, and a Viterbi detector. The Viterbi detector generates branch metrics with the equalization target levels as reference levels to determine recording data from an output of the equalizer. The Viterbi detector has a mode of generating the branch metrics and determining the recording data by limiting at least one out of a maximum value and a minimum value of the equalization target levels.

Information detection device and optical disc device

An A/D converter samples a read signal in synchrony with a system clock sclk having a fixed frequency, to perform an A/D conversion. A fluctuation compensator is configured as an internal-feedback-type compensation filter, and suppresses fluctuation of a digital signal output from the A/D converter. A digital PLL uses an interpolator to generate, by interpolation, a sampled value of the read signal at a timing in synchrony with a channel frequency, and uses NCO to generate a synchronizing clock and an interpolated-phase signal that is fed back to the interpolator. A binarization circuit binarizes the read signal based on the interpolated value output from the interpolator. The frequency characteristic of the fluctuation compensator is controlled based on the frequency value output from the loop filter.

Information reproducing device

An LPP detection unit detects an LPP from a wobble signal. A correction unit obtains a difference set by performing processing of calculating a difference in signal level between an LPP-present sync pattern portion and a non-LPP sync pattern portion having the same polarity, and executes correction on an RF signal at a timing when the LPP is detected, by using the difference set. The LPP-present sync pattern portion is a sync pattern portion obtained when the LPP is detected at the timing of the sync pattern portion positioned at the head of a sync frame of the RF signal. The non-LPP sync pattern portion is a sync pattern portion obtained when no LPP is detected at the timing of the sync pattern portion of the sync frame. In the case of reproducing information recorded on a DVD-R/RW optical disk, the occurrence of errors due to the effect of the LPP can be reduced.

Optical disk device

An information readout apparatus includes analog to digital converting means, equalizing means, interpolating means, maximum likelihood detecting means and PLL means. The analog to digital converting means converts a read signal read out from an optical disc medium, on which data is recorded with run length limited code that the shortest run length is 1, into a digital signal, and outputs the digital signal in synchronous with a first clock signal with a frequency which is N/M times of a channel frequency. At this time, N is an integer equal to or more than 2 and M is an integer meeting N/M&#x3e;0.5. The equalizing means equalizes said digital signal to a previously specified partial response (PR) characteristic in synchronous with said first clock signal signal. The interpolating means converts N input data outputted from said equalizing means into M output data, and outputs output data in synchronous with a second clock signal with a frequency of 1/M times of the channel frequency. The maximum likelihood detecting means converts the output data outputted from said interpolation means into an M-bit detection data, and outputs said detection data in synchronous with said second clock signal signal. The PLL means generates said first clock signal and said second clock signal based on said read signal.

Information readout apparatus and information reproducing method

An optical disc device includes an optical head section and a regularity monitoring circuit. The optical head section generates a wobble signal indicating wobbling of a track formed on a recording surface of an optical disc medium based on a reflected light reflected by the optical disc medium. The regularity monitoring circuit judges an existence or absence of a defect on the optical disc medium based on a difference between the wobble signal and a signal indicating the wobble under a normal condition.

Optical disc device and defect detection method for optical disc medium

Reproduced signals are equalized by the least square technique by using a predetermined number of data samples binarized by a Viterbi decoder. Even when data written on an optical disk is unknown, the data can be equalized in a stable manner and can be reproduced at a low error rate without instability factors such as divergence due to interference.

Reproduced signal equalizing method for optical information media and optical information reproducing/recording apparatus

In order to evaluate the quality of a signal recorded on an optical recording medium, a target signal is obtained based on a predetermined data string and a predetermined partial response characteristic, and for each clock cycle, an equalization error is calculated that is a difference between the target signal and a signal reproduced each clock cycle. Further, the product of the equalization errors calculated at different times is obtained, and based on the obtained product, the quality of a signal is evaluated.

Optical disk, optical disk recording/reproduction apparatus, and optical disk signal quality evaluation method

An A/D converter includes a low-bit resolution A/D which converts an input signal into a digital value of 4 bits or less, and a low-pass digital filter which suppresses a high-frequency-band component in an output from the low-bit resolution A/D, and extracts phase information contained in the input signal as amplitude information. A digital PLL circuit and information recording apparatus are also disclosed.

A/D converter, digital PLL circuit using the same, and information recording apparatus using the same

A VCO, which good temperature characteristics, high frequency accuracy, and high phase accuracy is provided as an LSI, without making its master clock frequency operate the VCO high. The VCO includes a digital VCO, a phase modulator, and a frequency band limiting element. The digital VCO outputs an oscillating frequency clock and a phase difference lower than an output cycle resolution at the same timing as the output of the oscillating frequency clock. The phase modulator makes side-band components of the output from the digital VCO move from positions near the fundamental frequency to farther bands by modulating the phase of the output from the digital VCO based on the phase difference.

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Tokyo, Japan

Hiromi Honma