Sony Corporation

Hiromasa Ikeyama

Yoshiaki Nishide

Manabu Hara

Noriyuki Ono

Takashi Asaida

Taku Kihara

Fumihiko Sudo

Kazushige Takahashi

Motohiro Nakasuji

Shigetoshi Nohda

Yukihiro Kinoshita

Motohiro Nakasuzi

A noise correction circuit that detects and corrects noise included in an image signal output from an image sensor is provided. The noise correction circuit includes a noise determining unit, a noise removing unit, and a random number adding unit. The noise determining unit is configured to calculate an average value of a signal level in a predetermined range of the image signal output from the image sensor and use the calculated average value to calculate a noise component in a predetermined direction. The noise removing unit is configured to remove noise from the image signal output from the image sensor in response to the noise component determined by the noise determining unit. The random number adding unit is configured to add a random number at a level not determined by quantization of the image signal to the image signal after removal of the noise by the noise removing unit.

Noise correction circuit, imaging apparatus, and noise correction method adding random number after noise removal

An arithmetic processing section executes an arithmetic process on a flicker correction signal output from a flicker correction signal outputting section and corresponding to the flicker component contained in a video signal of each of specific periods and the video signal of each of the specific periods to form a corrected video signal of the specific period corrected for the flicker component of the specific period for the video signal of each of the specific periods formed as a succession of specific periods and containing a flicker component as supplied from a video signal generating section in response to a correction error signal of each of the specific periods supplied from a correction error detecting section.

Flicker correcting method, flicker correcting circuit, and imaging device using them

An image pickup method of picking up images at a frame rate changeably set out of a plurality of frame rates is provided. The method includes the steps of: setting a vertical synchronization cycle in accordance with a set frame rate and adding an image pickup signal that does not include a valid image pickup region in accordance with the set vertical synchronization cycle while keeping a horizontal synchronization cycle of each image pickup signal constant, when obtaining an image pickup signal from an image sensor; and correcting a time axis of an obtained image pickup signal that includes a valid image pickup region, correspondingly to the set frame rate and deleting an obtained image pickup signal that does not include the valid image pickup region.

Image pickup apparatus and image pickup method

An image pickup apparatus includes an image pickup device generating image signals of picked up images; a converting unit converting the image signals generated by the image pickup device to digital image signals; a memory storing the image signals obtained by the converting unit; and a memory control unit controlling writing the image signals in the memory and reading the image signals from the memory. The memory control unit assigns bands of the memory in order to simultaneously perform writing image signals in the memory and reading the image signals from the memory for displaying picked up images and/or reading the image signals from the memory for recording picked up images at different frame rates.

Image pickup apparatus and image pickup method to display or record images picked up at high rate in real time

A signal processing apparatus to be used for a solid-state image pickup element having a plurality of output systems that output video signals obtained from pixels arranged in a column direction includes a subtraction unit that subtracts an amended error value for each column from the video signals output from the solid-state image pickup element. The signal processing apparatus also includes an error value computing unit that shields the solid-state image pickup element from light or irradiates light to the solid-state image pickup element at a constant rate, computes a respective average value of each of a plurality of pixel signals obtained from the pixels in a predetermined region of the solid-state image pickup element, subtracts the respective average value from a respective of the plurality of the pixel signals obtained from the pixels of the solid-state image pickup element, and accumulates values obtained by subtractions for respective columns.

Signal processing apparatus and signal processing method for solid-state image pickup element and image pickup apparatus

Even when the light intensity of the light source varies, the flicker correction can thus be made flexibly. The present invention provides a flicker correction method comprising the steps of predicting, from an image of a present flicker-corrected frame, a flicker of an image of a next frame to generate two types of flicker images having flickers different in level from each other added thereto, detecting a flicker component through comparison between the generated two types of flicker images and an image of an input next frame, generating a flicker correction value on the basis of the detected flicker component, and making flicker correction by adding the generated flicker correction value to an input image frame by frame.

Flicker correction method and device, and imaging device

An apparatus includes a solid-state image pickup element that outputs video signals obtained from pixels arranged in a column direction. The apparatus also includes an amendment unit that amends an error value corresponding to a column position of the video signals according to a temperature to supply an amended error value to a subtraction unit that subtracts the amended error value for each column from the video signals. The apparatus further includes an error computing section that shields the pickup element from light or irradiates light to the pickup element at a constant rate, computes a respective average value of each of a plurality of pixel signals obtained from the pixels in a predetermined region of the pickup element, subtracts the respective average value from a respective of the plurality of pixel signals obtained from the pixels of the pickup element, and accumulates values obtained by subtractions for respective columns.

Even in case the shutter speed is high, a flicker can be corrected accurately. A flicker correction method in which a flicker is corrected by predicting, from a present input frame image, a flicker component in an image of a next frame and adding a correction value to the next frame image on the basis of the predicted flicker component includes holding a plurality of flicker data, calculating the correction value by combining a plurality of flicker data together at a ratio set correspondingly to a shutter speed and frame rate, and adding the calculated correction value to the input image signal.

There is provided an image pickup device in which an overall output image can be prevented from being affected by an image signal of a mask area. According to the image pickup device, a prescribed area in a pickup image is masked to keep the masked area non-displayed in the output image, and the image signal of the mask area is removed from a detection target for image processing to prevent the image signal of the masked area from affecting the image processing on the overall image, whereby the image processing such as automatic exposure processing, automatic white balance processing, etc can be properly performed and the image quality of the output image can be enhanced.

Image pickup device and image processing method having a mask function

A flicker is corrected with consideration given to the influence of noises. The present invention provides a flicker correction method in which a flicker is corrected by subtracting a flicker correction signal from an image signal, the method including the steps of removing noise from the flicker-corrected image signal by passing the latter through a low-pass filter, generating a correction error signal from the noise-removed, flicker-corrected image signal and the image signal not yet flicker-corrected, removing the image signal not yet flicker-corrected by passing the latter through a low-pass filter, and generating a flicker correction signal from the noise-removed image signal and correction error signal.

A quantization-precision-reproduction method including the steps of reproducing an m-bit-length high-precision component lower than or equal to quantization precision of an n-bit-length digital signal on the basis of the n-bit-length digital signal, and generating an n+m-bit-length digital signal by adding the reproduced m-bit-length high-precision component to a low-order bit of the n-bit-length digital signal is provided.

Quantization-precision-reproduction method, quantization-precision-reproduction device, image-pickup device, information-processing device, and program

An imaging device for receiving an input image and producing two size-adjusted output images. The imaging device includes a detector that captures the input image and outputs the captured input image as image data; a first adjuster for performing image size adjustment using a linear interpolation on the image data to produce a first output image that is displayed and outputted; a second adjuster for performing image size adjustment using a curve interpolation on the image data to produce a second output image that is recorded on a recording medium.

Imaging device

(M-N) 0 data are inserted for every N data of the f.sub.SL input data by an interpolation circuit 20 for generating f.sub.SH rate data, while filter coefficients are sequentially generated by M coefficient generators 30A to 30D at the f.sub.SH rate. A register postfix type transversal filter 40 effectuates up rate conversion of N:M (N&lt;M) of generating f.sub.SH rate output data from f.sub.SL rate input data. The transversal filter 40 includes M multipliers 41A to 41D for multiplying the f.sub.SH rate data generated by the interpolation circuit 20 with the filter coefficients sequentially applied by the coefficient generators 30A to 30D and each (M-1) delay circuits 42A to 42C and additive units 43A to 43C for delaying product outputs of the multipliers 41A to 41D by unit time delay and summing the delayed product output together.

Rate converter using a register postfix type transversal filter

A rate converter for converting data rate is adapted to hold, at an output clock rate, by using a plurality of latch circuits, respective signals from the output stages of a shift register operative at an input clock rate to multiply, at the output clock rate by using a plurality of multipliers, held signals from the latch circuits by filter coefficients that a plurality of coefficient generators sequentially generate to add the multiplied outputs by using an adder to provide a rate converted output signal. Thus, this rate converter makes it possible to carry out rate conversion by a single digital filter without necessity of digital filters operative at a clock rate of the least common multiple of the input clock rate and the output clock rate.

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Tokyo, Japan

Hiromasa Ikeyama