Hitachi, Ltd.

Hitachi Automotive Systems, Ltd.

Renesas Technology Corp.

Minebea Company, Limited

Hiroki Yamashita

Masayoshi Yagyu

Koji Fukuda

Takashi Takemoto

Tatsuya Saito

Fumio Yuuki

Hiroyuki Itoh

Hirotoshi Tanaka

Tatsuya Kawashimo

Atsumi Kawata

Taizo Yamawaki

Hidehiro Toyoda

Teppei Hirotsu

Noboru Masuda

Shinji Tsuji

Goichi Ono

Satoru Isomura

Kenji Nagai

Keiichirou Nakanishi

Tomohiko Yano

Masahito Sonehara

Ryosuke Ishida

Hirofumi Kurimoto

Tatsuya Saitoh

Ryo Nemoto

Kenichi Hoshino

Tsuneyo Chiba

Kazuhiro Yoshihara

Yasunari Umemoto

Osamu Kagaya

Takeshi Kato

Keiichi Yamamoto

Katsuya Tanaka

Norio Chujo

Mitsuhiko Watanabe

Takashige Baba

Akira Masaki

Tetsuya Uemura

Tohru Kobayashi

Minoru Yamada

Ichiro Imaizumi

Ming Liu

Atsushi Arata

Masakazu Yamamoto

Junji Shigeta

Tomofumi Hokari

Hisaaki Kanai

Takashi Muto

Yusuke Takeuchi

Atsushi Itoh

Nobuhiro Taniguchi

Daisuke Hamano

Akio Koyama

Fumio Yuki

Ryusuke Sahara

Tatsuhiro Aida

Satoshi Hososaka

Hirofumi Kariya

Hiroaki Kurahashi

Tetsuya Umemura

Tomohisa Iwanaga

Rieko Ishida

A communication device includes a master station, a ring-type transmission line whose start point and end point are connected to the master station, and a plurality of slave stations connected to the ring-type transmission line in parallel. The master station transmits a signal and feeds electric power from both of the start point and the end point of the ring-type transmission line. Each of the slave stations includes an impedance variable element connected to the ring-type transmission line in parallel, and values are set to the impedance variable elements in accordance with the connection positions of the slave stations.

Communication device and automobile including the same

A load drive system for driving a load supplied with power from a power line includes a control unit which controls switching between the power line and the load and a communication unit which communicates using voltage and current of the power line. When performing the switching, the control unit controls, based on a width of a transition period of the power-line current, the transition period being attributable to the switching, timing of the switching so as to move the transition period away from a center of a period corresponding to a symbol communicated by the communication unit.

Load drive system and load drive method

A correct commutation is realized even if a communication error occurs due to a change in an actuator drive current. An electronic control unit that includes a communication section outputting a control signal and that can transmit the control signal to an actuator connected to the electronic control unit via a power line, includes an actuator operation detection section. When the actuator operation detection section detects an actuator operation, the communication section retransmits the control signal at timing of detecting the actuator operation.

Electronic control apparatus provided with power line communication function, actuator, electronic control system, and automobile using same

A power line communication apparatus includes a drive block including an actuator control circuit and a drive circuit and a communication block. The actuator control circuit generates a control pulse for controlling an actuator, and controls a transition timing of the control pulse during an operation period set within a communication cycle by a communication clock. The drive circuit controls a driving current of the actuator supplied from a DC power source through a power line based on the control pulse in which the transition timing is controlled. The communication block generates the communication clock, and modulates a current flowing through the power line in response to data to be transmitted during a signal transmission period different from the operation period, set within the communication cycle.

Power line communication apparatus and electronic control apparatus including power line communication apparatus

The high-speed and high-quality reception operation of a transimpedance amplifier of an optical communication module and a router including the same can be achieved. A preamplifier performs current/voltage conversion with respect to intersymbol interference due to bandwidth shortage of a laser diode. A threshold control circuit which generates positive and negative threshold voltages with respect to a center potential of an output signal, latch circuits, and a selector circuit are provided to the output of the preamplifier. An NRZ signal is received as a duobinary signal based on the sign determination result of the previous bit. The determination error rate of the latch circuits can thus be improved.

Optical transmission circuit with upper and lower threshold control

Provided is a transimpedance amplifier which can realize a high-speed and high-quality receiver operation in an optical communication module or a router device having the optical communication module. An offset voltage which is generated in a post amplifier for differentiating and amplifying a single-phase output signal from a pre-amplifier in accordance with single-phase differentiation and conversion is cancelled by detecting a threshold voltage from an output of the pre-amplifier or an output of the post amplifier by a threshold detection circuit and by shifting a level of the threshold voltage corresponding to an offset amount to be compensated.

Transimpedance amplifier

An optical module including a transimpedance amplifier capable of realizing a high-speed and high-quality receiving operation is provided. A transimpedance amplifier includes: a pre-amplifier using a single-end current signal as an input and converting the single-end current signal to a single-end voltage signal; an automatic decision threshold control detecting a center electric potential of the single-end voltage signal serving as an output of the pre-amplifier; a post-amplifier differentiating and amplifying the single-end voltage signal of the output of the pre-amplifier; and a power circuit supplying power to the pre-amplifier. Particularly, in accordance with an input voltage signal or an output voltage signal of the pre-amplifier, the power circuit outputs a varied current that flows to a supply terminal of the pre-amplifier and a varied current having a phase opposite to that of the varied current. Thus, the power supply current change is cancelled out.

Transimpedance amplifier, semiconductor device, and optical module to include an adding circuit for adding first and second current variation

A high-speed semiconductor integrated circuit device is achieved by adjusting an offset voltage. For example, dummy NMOS transistors MND(MNDand MND) and MND(MNDand MND) are connected to drain outputs of NMOS transistors MNand MNoperated according to differential input signals Din_p and Din_n, respectively. The MNDis arranged adjacent to the MN, and a source of the MNDa and a drain of the MNshare a diffusion layer. The MNDis arranged adjacent to the MN, and a source of the MNDand a drain of the MNshare a diffusion layer. The MNDand the MNDfunction as dummy transistors for suppressing variations in process of the MNand the MNand, and besides, they also function as means for adjusting the offset voltage by appropriately applying an offset-amount setting signal OFST to each gate to provide a capacitor to either the MNor the MN

Semiconductor integrated circuit device

A transmitter circuit in which a driver circuit includes MOS transistors for bias voltage application, in which a driving current flows, cascode-connected to MOS transistors for differential signal input controlled by a voltage value of transmitted data signals, controlled by a voltage value of a bias voltage, and driver circuits include MOS transistors for bias voltage application, in which a driving current flows, cascode-connected to MOS transistors for differential signal input that is controlled by a voltage value of signals obtained by the transmitted data signals, connected to a load portion, and controlled by a voltage value of a bias voltage.

Transmitter circuit

The invention relates to a clock generation circuit and a signal reproduction circuit including the clock generation circuit, and, more particularly, the invention provides a data judgment/phase comparison circuit capable of performing both of data judgment and phase comparison by a single-phase clock, and provides a CDR (Clock Data Recovery) circuit including the data judgment/phase comparison circuit. The same data and clock are inputted to two data judging units C_GOOD and C_BAD each having a different data determination period (setup/hold time) required for correctly judging a data, and an output of the data judging unit C_GOOD having a shorter required data determination period is taken as a data output of the data judgment/phase comparison circuit. When the outputs of both of the data judging units are different from each other, a signal Early indicating that a clock phase is too early or a signal Late indicating that the clock phase is too late is outputted. Depending on a relation among data outputs of total three symbols obtained by combining a symbol and symbols previous and subsequent thereto, it is selected that either the Early or the Late is to be outputted by a decision logic EL_LOGIC.

Data judgment/phase comparison circuit

An optical communication module and an optical communication device including the same are provided. For example, a first semiconductor chip on which a laser diode is formed and a second semiconductor chip on which a laser diode driver circuit, etc. for subjecting the laser diode to drive by current are formed are mounted on a package printed circuit board to be close to each other. Temperature detecting means is further formed on the second semiconductor chip (laser diode driver circuit, etc.). The temperature detecting means detects a temperature variation &#x394;T of the first semiconductor chip (laser diode) transmitted via a wiring in the package printed circuit board and controls the magnitude of the driving current of the laser diode driver circuit based on a detection result.

Optical communication module and optical communication device

Disclosed is an output driver circuit capable of realizing reduction in power consumption, and/or enhancement in transmission waveform quality in addition to an increase in transmission speed. The output driver circuit is provided with, for example, a voltage-signal generation circuit block VSG_BK for driving positive negative output-nodes (TXP, TXN) by voltage, -pulse-signal generation circuits PGEN, PGENfor generating a pulse signal upon a transition of data input signals DIN_P, DIN_N, and current-signal generation circuit blocks ISG_BKp, ISG_BKn, for driving TXP, TXN by current for the duration of a pulse width of the pulse-signal. The current-signal generation circuit block executes high-speed charging of parasitic capacitors Cp, Cp, occurring to TXP, TXN, respectively, while executing charging of parasitic capacitors Cp, Cp, occurring to impedance Zrespectively. VSG_BK decides a voltage level at TXP, TXN, in the stationary state, keeping TXP, TXN as terminal nodes at impedance Z, respectively.

Output driver circuit

An optical communication device which can be operated at high speed is provided. For example, the optical communication device includes: a pre-amplifier circuit PREAMPamplifying a current signal Iin from a photodiode PD, and converting an amplified signal into a voltage signal; and an operating-point controller circuit VTCTLcontrolling an operation of the PREAMP. The PREAMPincludes a negative feedback path formed by a feedback resistance Rf, and includes: a level-shift circuit LSlevel-shifting in accordance with an operating-point control signal Vcon; and an amplifier circuit AMPconnected to a subsequent stage of the LSand performing an amplifying operation with a high gain. The VTCTLincludes a replica circuit configured by the same circuit and circuit parameter as those of the AMPand electrically connected between the input and the output, and generates the Vcon so that an output DC level of this replica circuit is matched with an input DC level of the AMP

Optical communication device

A low offset input circuit and a signal transmission system which can accommodate a high-speed interface and achieve reduction of an offset voltage are provided. An offset voltage compensating circuit blockhaving an input circuit blockincluding an input circuitand an adder-subtractor circuit block, switches, a detecting circuit block, and an adjusting and holding circuit blockis provided. To compensate for an offset voltage of the input circuit block, an offset voltage of the input circuit blockis detected at the detecting circuit blockby turning on the switches, and the detected offset voltage is held in the adjusting and holding circuit block, and negative feedback of the held offset voltage to the adder-subtractor circuit blockis performed. Thereby, signals Vop, Von having compensated offset voltages are outputted from the input circuit block

Low offset input circuit and transmission system with the input circuit

A signal recovery circuit capable of expanding the receive margin is provided. The signal recovery circuit comprises for example a clock generator unit CLK_GEN for generating the clock signals CLKa, CLKb, and CLKc, a window width control unit WW_CTL, and a clock data discriminator unit CD_JGE for generating a phase detector signal (EARLY, LATE) when for example a data signal Di pulse edge enters between the CLKa and CLKb, or between the CLKb and CLKc, and the clock generator unit. Along with exerting control based on these phase detection signals to maintain the mutual phase differential of the overall phase of CLKa, CLKb, CLKc so as to prevent intrusion of the above described Di edge, the CLK_GEN also regulates the phase differential between CLKa and CLKb, and the phase differential between CLKb and CLKc based on a signal (Sww) from the WW_CTL.

Signal recovery circuit

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Hachioji, Japan

Hiroki Yamashita