Rohm Co., Ltd.

Joled Inc.

Nissha Co., Ltd.

Hiroki Yamamoto

Hiroshi Tamagawa

Yasuhiro Kondo

Keishi Watanabe

Katsuya Matsuura

Hiroyuki Yamakita

Yoshihiro Tada

Kenichi Masumoto

Hiroshi Oji

Takashi Matsumoto

Yuri Kuwahara

Mitsuharu Kira

The present invention is directed to a chip diode with a Zener voltage Vz of 4.0 V to 5.5 V, including a semiconductor substrate having a resistivity of 3 m&#x3a9;&#xb7;cm to 5 m&#x3a9;&#xb7;cm and a diffusion layer formed on a surface of the semiconductor substrate and defining a diode junction region with the semiconductor substrate therebetween, in which the diffusion layer has a depth of 0.01 &#x3bc;m to 0.2 &#x3bc;m from the surface of the semiconductor substrate.

Chip diode and method for manufacturing same

A chip part according to the present invention includes a substrate having a penetrating hole, a pair of electrodes formed on a front surface of the substrate and including one electrode overlapping the penetrating hole in a plan view and another electrode facing the one electrode, and an element formed on the front surface side of the substrate and electrically connected to the pair of electrodes.

Chip parts and method for manufacturing the same, circuit assembly having the chip parts and electronic device

A method for manufacturing a chip component includes forming an element, which includes a plurality of element parts, on a substrate. A plurality of fuses are formed, for disconnectably connecting each of the plurality of element parts to an external connection electrode. The external connection electrode, which is arranged to provide external connection for the element, is formed by electroless plating on the substrate.

Method of manufacturing a chip component

A Schottky barrier diode includes a semiconductor layer having a major surface, a diode region of a first conductivity type formed in a surface layer portion of the semiconductor layer, a first conductivity type impurity region formed in the surface layer portion of the semiconductor layer and electrically connected to the diode region, a first electrode layer formed on the major surface of the semiconductor layer and forming a Schottky junction with the diode region, a second electrode layer formed on the major surface of the semiconductor layer and forming an ohmic junction with the first conductivity type impurity region, and a contact electrode layer formed on a peripheral region of the major surface of the semiconductor layer surrounding the first electrode layer so as to be electrically connected to the diode region via the semiconductor layer and being electrically connected to the second electrode layer.

Schottky barrier diode

A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.

Chip capacitor, circuit assembly, and electronic device

A chip part includes a substrate, an element formed on the substrate, and an electrode formed on the substrate. A recess and/or projection expressing information related to the element is formed at a peripheral edge portion of the substrate.

Semiconductor device having first and second electrode layers electrically disconnected from each other by a slit

A bidirectional Zener diode of the present invention includes a semiconductor substrate of a first conductivity type, a first electrode and a second electrode which are defined on the semiconductor substrate, and a plurality of diffusion regions of a second conductivity type, which are defined at intervals from one another on a surface portion of the semiconductor substrate, to define p-n junctions with the semiconductor substrate, and the plurality of diffusion regions include diode regions which are electrically connected to the first electrode and the second electrode, and pseudo-diode regions which are electrically isolated from the first electrode and the second electrode.

Bidirectional Zener diode

A gas sensor, disposed projecting from a wiring member serving as a mounting target and including a first wire and a second wire, the gas sensor detecting a gas that produces water in a case that the gas is combusted by being supplied with a voltage from the first wire and the second wire and measuring a resistance value using the first wire and the second wire, the gas sensor including a resistor holding a catalyst that facilitates combustion of the gas, a first electrode terminal connected between one end of the resistor and the first wire, and a second electrode terminal connected between another end of the resistor and the second wire, and the first electrode terminal and the second electrode terminal are fixed to each other and form a water vapor diffusion cavity.

Gas sensor

A bidirectional Zener diode includes a substrate. A first conductivity type base region is formed in a surficial portion of the substrate. A second conductivity type first impurity region is formed in a surficial portion of the base region so as to form a pn junction with the base region. A second conductivity type second impurity region is formed in a surficial portion of the base region in a manner spaced apart from the first impurity region so as to form a pn junction with the base region. A first electrode is arranged at the surface of the substrate. A second electrode is arranged at the surface of the substrate. A dimension of the base region along the surface of the substrate between the first impurity region and the second impurity region is equal to or greater than 4.0 &#x3bc;m and equal to or smaller than 12.5 &#x3bc;m.

Bi-directional Zener diode having a first and second impurity regions groups formed in surface portion of a substrate and a first electrode electrically connected to at least one first impurity regions, and not connected from at least another one

The chip part of the present invention includes a substrate, an electrode on the substrate and having a front surface in which a plurality of recessed portions are formed toward the thickness direction thereof, and an element region having a circuit element that is electrically connected to the electrode.

A discrete capacitor of the present invention includes a substrate having a front surface portion, an impurity diffusion layer formed on the front surface portion of the substrate, an oxide film formed on the substrate and having a first opening to selectively expose the impurity diffusion layer, a dielectric film formed on the impurity region having been exposed from the oxide film, and a first electrode opposed to the impurity diffusion layer with the dielectric film therebetween, wherein the impurity concentration on the front surface portion of the impurity diffusion layer is 5&#xd7;10cmor more.

Discrete capacitor and manufacturing method thereof

A chip component includes a chip component main body, an electrode pad formed on a top surface of the main body, a protective film covering the top surface of the main body and having a contact hole exposing the pad, and an external connection electrode electrically connected to the pad via the hole and having a protruding portion, which, in a plan view looking from a direction perpendicular to a top surface of the pad, extends to a top surface of the film and protrudes further outward than a region of contact with the pad over the full periphery of an edge portion of the hole. A method for manufacturing the component includes forming the pad on the main body's top surface, forming the protective film, forming the hole in the film so as to expose the pad, and forming the electrode electrically connected to the pad via the hole.

Growing community of inventors

Kyoto, Japan

Hiroki Yamamoto