Kioxia Corporation

Toshiba Memory Corporation

Kabushiki Kaisha Toshiba

Hiroki Tokuhira

Takahisa Kanemura

Shigeo Kondo

Michiru Hogyoku

Masaki Kondo

Takashi Izumida

Tsukasa Nakai

Hiroki Kawai

Fumitaka Arai

Nobutoshi Aoki

Toshiyuki Enda

Hiroyoshi Tanimoto

Hikari Tajima

Katsuyoshi Komatsu

Hideto Horii

Shunichi Seno

Teruhisa Sonohara

Hideaki Aochi

Daisuke Watanabe

Toshihiko Nagase

Masatoshi Yoshikawa

Yoshihiro Ueda

Kazuhiko Yamamoto

Tadaomi Daibou

Tsuyoshi Kondo

Takayuki Miyazaki

Tomoya Sanuki

Mutsumi Okajima

Kunifumi Suzuki

Yuichi Ito

Yusuke Higashi

Tadayoshi Uechi

Naoki Kusunoki

Hiroyuki Ode

Takashi Kurusu

Jieqiong Zhang

Hiroshi Takehira

Kazuya Matsuzawa

Yoshitomo Kobayashi

Takao Kosaka

A semiconductor memory device includes a first wiring extending in a first direction; a second wiring extending in a second direction and spaced from the first wiring in a third direction; a stacked body disposed between the first and second wirings and including conductive layers and insulating layers alternately stacked on top of one another in the third direction; a columnar body extending through the stacked body and including: (a) an electrode disposed between the first wiring and the second wiring, (b) a memory layer disposed between the electrode and the conductive layers, and (c) a selection layer disposed between the electrode and the first wiring; and a diode disposed between the electrode and the second wiring.

Semiconductor memory device

A semiconductor device includes a first conductive layer extending along a first direction, a semiconductor layer extending along a second direction crossing the first direction, penetrating the first conductive layer, and including an oxide semiconductor, a first insulating layer between the first conductive layer and the semiconductor layer, a second conductive layer provided on one side of the semiconductor layer in the second direction and electrically connected thereto, a third conductive layer provided on the other side of the semiconductor layer in the second direction and electrically connected thereto, an electric conductor extending from the third conductive layer toward the second conductive layer along the semiconductor layer, and a charge storage film between the semiconductor layer and the electric conductor.

Semiconductor device and semiconductor storage device

A semiconductor memory device includes: a first wiring; a first semiconductor layer connected to the first wiring, the first semiconductor layer; a first electrode, the first electrode being connected to the first semiconductor layer; a second electrode disposed between the first electrode and the first wiring, the second electrode being opposed to the first semiconductor layer; a third electrode disposed between the second electrode and the first wiring, the third electrode; a second semiconductor layer disposed between the third electrode and the first semiconductor layer, the second semiconductor layer being opposed to the third electrode; and an electric charge accumulating layer electrically connected to the first wiring via the second semiconductor layer, the electric charge accumulating layer being opposed to the first semiconductor layer.

A semiconductor memory device according to an embodiment includes a first stacked body, a second stacked body, an intermediate conductive layer, an intermediate insulating layer, a semiconductor pillar, a charge storage film, and an insulating film. The semiconductor pillar includes a first part, a second part, and a third part. The charge storage film includes a first charge storage portion and a second charge storage portion. The charge storage film includes at least one first element selected from the group consisting of nitrogen, hafnium, and aluminum. The insulating film provides in at least a portion between the intermediate conductive layer and the first part. The insulating film not includes the first element, or the insulating film has a concentration of the first element lower than a concentration of the first element of the charge storage film.

Semiconductor memory device and method for manufacturing the same

A resistance change device of an embodiment includes: a first electrode; a second electrode; and a stack disposed between these electrodes, and including a first layer containing a resistance change material and a second layer in contact with the first layer. The resistance change material contains at least one of a first element such as Ge and a second element such as Sb, and at least one third element selected from Te, Se, S, and O. The second layer contains a crystal material containing at least one selected from a group consisting of a first material having a composition represented by (Ti,Zr,Hf)CoSb, (Zr,Hf)NiSn, or Fe(Nb,Zr,Hf)(Sb,Sn), a second material having a composition represented by Fe(V,Hf,W)(Al,Si), and a third material having a composition represented by Mg(Si,Ge,Sn).

Resistance change device and storage device

A magnetic memory of an embodiment includes: a first magnetic member including a first and second portions and extending in a first direction; a first and second wirings disposed to be apart from the first magnetic member and extending in a second direction intersecting the first direction, the first and the second wirings being separated from each other in a third direction intersecting the first and second directions, the first magnetic member being disposed to be apart from a region between the first wiring and the second wiring in the first direction; and a second magnetic member surrounding at least parts of the first and second wirings, the second magnetic member including a third portion located to be more distant from the first magnetic member, a fourth portion located to be closer to the first magnetic member, and a fifth portion located in the region.

Magnetic memory

A resistance variable device of an embodiment includes a stack arranged between a first electrode and a second electrode and including a resistance variable layer and a chalcogen-containing layer. The chalcogen-containing layer contains a material having a composition represented by a general formula: C1C2A, where C1 is at least one element selected from Sc, Y, Zr, and Hf, C2 is at least one element selected from C, Si, Ge, B, Al, Ga, and In, A is at least one element selected from S, Se, and Te, and x, y, and z are numbers representing atomic ratios satisfying 0&#x3c;x&#x3c;1, 0&#x3c;y&#x3c;1, 0&#x3c;z&#x3c;1, and x+y+z=1, and when an oxidation number of the element C1 is set to a, and an oxidation number of the element C2 is set to b, the atomic ratio x of the element C1 satisfies x&#x2264;(3&#x2212;(3+b)&#xd7;y&#x2212;z)/(3+a).

Resistance variable device with chalcogen-containing layer

A selector includes a first electrode, a second electrode, and a selector layer provided between the first electrode and the second electrode and contains SiTeN. The x, y, and z of the SiTeNsatisfy 0&#x3c;x&#x2264;35, 15&#x2264;y&#x2264;50, and 50&#x3c;z&#x2264;85, satisfy 0&#x3c;x&#x2264;45, 15&#x2264;y&#x2264;55, and 40&#x3c;z&#x2264;85, or satisfy 0&#x3c;x&#x2264;55, 15&#x2264;y&#x2264;65, and 30&#x3c;z&#x2264;85.

Selector and non-volatile storage device

An example semiconductor device includes: n conductive layers including first to nconductive layers stacked in a first direction; a first semiconductor region of a first conductive type; a second semiconductor region of a second conductive type closer to the nconductive layer than the first semiconductor region; a semiconductor layer provided between the first semiconductor region and the second semiconductor region, extending in the first direction, penetrating the n conductive layers, and having an impurity concentration lower than a first conductive impurity concentration of the first region and a second conductive impurity concentration of the second region; n charge storage regions including first to ncharge storage regions provided between the n conductive layers and the semiconductor layer, and a control circuit that controls a voltage applied to the n conductive layers to always prevent charges from being stored in at least one of the n charge storage regions.

System and method for controlling semiconductor memory device including multiple charge storage regions

A storage device includes a first group of wirings extending in a first direction, a second group of wirings extending in a second direction, and memory cells between the first and second groups, each including a variable resistance element and a selection element becoming conductive when a voltage greater than a threshold is applied. Va applied across a first cell to be selected satisfies Va&#x3e;Vd&#x3e;Vb and Va&#x3e;Vd&#x3e;Vc. A first wiring of the first group and a second wiring of the second group are connected to the first cell. A third wiring of the first group and a fourth wiring of the second group are adjacent to the first wiring and the second wiring. Vb, Vc, and Vd are applied across a second cell between the first and fourth wirings, a third cell between the second and third wirings, and a fourth cell between the third and fourth wirings.

Storage device

A semiconductor memory device includes a stacked body including insulating layers and gate electrode layers alternately stacked in a direction, a semiconductor layer extending in the direction, and a gate insulating layer provided between the semiconductor layer and the gate electrode layer, and including a first layer, a second layer, and a third layer between the first layer and the second layer. The first layer includes a first insulator, the second layer includes at least one oxide selected from aluminum oxide, yttrium oxide, lanthanum oxide, gadolinium oxide, ytterbium oxide, hafnium oxide, and zirconium oxide, the third layer includes at least one material selected from silicon, germanium, silicon germanium and silicon carbide, and the third layer is positioned between the semiconductor layer and the insulating layer.

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Kawasaki, Japan

Hiroki Tokuhira