Sanyo Electric Co., Ltd.

Hiroki Nagai

Shin-ichiro Tomisawa

Tatsushi Ohyama

Hideki Yamauchi

Toshiyuki Shutoku

Satoshi Noro

Takuya Shiraishi

Toru Arisaka

An encoding apparatus which forms sector units of data, to each of which a header and an error detection code are added, from record data to be recorded on an optical disk, arranges a plurality of the sector units of data to form a matrix that is a block unit of data, scrambles the block unit of data exclusive of the headers and error detection codes, appends a first error correction code for each row of the block unit of data, and appends a second error correction code for each column of the block unit of data. The encoding apparatus comprises a generator of the error detection codes; a section that performs the scrambling; a generator of the first error correction codes; a generator of the second error correction codes; and an encoding controller that controls the processes in the above sections to be performed in parallel.

Encoding apparatus for storing data to disk

A data processor compatible for use with a CD and a DVD includes a first modulation circuit for modulating recording data for recording on a CD to generate first modulated data. A second modulation circuit modulates recording data for recording on a DVD to generate second modulated data. A write signal generation circuit generates a first write signal, which is written to the CD, from the first modulated data, and a second write signal, which is written to the DVD, from the second modulated data. The write signal generation circuit is commonly used for the CD and the DVD to reduce the circuit area of the data processor.

Data processor used in a plurality of optical disk recording mediums

A data reproducing controller for operating a device for reproducing data at a high speed, which is recorded on a disc and includes an error correction code. A PI correction circuit performs an error correction process on a PI and causes a completion signal to go high whenever processing of 182 bytes of data is completed. A counter circuit sequentially increments a count value whenever the completion signal goes high. A determination circuit compares the count value with a predetermined set value and determines whether the data of which PI has undergone the error correction process is a PO row based on the comparison. The determination circuit causes a first control signal to go low when the data is a PO row. A descrambling circuit skips the data that is determined to be a PO row.

Data reproducing controller

A code error corrector that enables high speed reproduction of DVD data with a high error correction capability. The data read from the DVD is stored in a DRAM. A PI correction circuit, which performs error correction with an inner parity, and a PO correction circuit, which performs error correction with an outer parity, alternately perform error correction for a predetermined number of times on the data stored in the DRAM. The detection circuit checks whether an error is included in the error corrected data whenever error correction is performed. If an error is not detected, the repeating of the error correction is stopped even if the error correction has not been performed for the predetermined number of times.

Code error corrector

A data buffer receives and temporarily stores data including a product code enabling error correction in first and second directions. An exclusive-OR operation circuit uses an error amount detected by error correction in the first direction and data stored in a storage element to calculate a first error check result. A PI direction error-checking circuit according to the first error check result performs error check after error correction in the first direction. A PO direction partial error-checking circuit and a PO direction aggregate error-checking circuit use an error amount detected in error correction in the second direction and calculate a second error check result. The first and second error check results are used to generate a final error check result by an exclusive-OR operation circuit.

Growing community of inventors

Gifu-ken, Japan

Hiroki Nagai