Sharp Kabushiki Kaisha Corporation

Hiroki Igarashi

Hiroshi Iwata

Akihide Shibata

Takeshi Shiomi

Kohtaroh Kataoka

Shuji Wakaiki

Masaru Nomura

A high-withstand-voltage normally-on transistor and a low-withstand-voltage normally-off transistor are connected in series, and diodes are provided in reverse parallel to the transistor. A gate terminal of the transistor is connected to a source terminal of the transistor, and a gate driving circuit that outputs a control signal to a gate terminal of the transistor is provided. Forward voltage of the diode is made lower than forward voltage of the diode, and an inductance component of a path connecting nodes via the diode is made greater than an inductance component of a path connecting the nodes via the diode. Accordingly, a switching circuit which includes transistors connected in series and in which transient current at a time of turning off is reduced is provided.

Switching circuit including serially connected transistors for reducing transient current at time of turning off, and power supply circuit provided therewith

A power factor correction circuit includes: a coil and MOSFETs that boost an input voltage to generate a boosted voltage; a first capacitor having one end connected to a first output terminal, and the other end connected to an intermediate node; and a second capacitor having one end connected to the intermediate node, and the other end connected to a second output terminal. In a first operation mode, the boosted vol tage is applied to the two ends of the first capacitor when a positive voltage is input, and applied to the two ends of the second capacitor when a negative voltage is input. In a second operation mode, the boosted voltage is applied to two ends of the first and second capacitors connected in series. Thus, there is provided a power factor correction circuit which has a high efficiency and is compatible with an input voltage in a broad range.

Power factor correction circuit and power supply device

A highly efficient and low-cost switching power supply device includes a high withstand voltage transistor and a low withstand voltage transistor. When current flows from a second node to a first node, the high withstand voltage transistor turns on and the low withstand voltage transistor turns off, causing current to flow through a built-in diode of the low withstand voltage transistor. Since current does not flow through the parasitic diode of the high withstand voltage transistor, the recovery current is reduced. Furthermore, since a first delay circuit including resistors and a diode is connected to the gate electrode of the high withstand voltage transistor, and a second delay circuit including resistors and a diode is connected to the gate electrode of the low withstand voltage transistor, precise adjustment of the switching speed during switching operation is possible, and losses are reduced.

Growing community of inventors

Osaka, Japan

Hiroki Igarashi